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C8051F040-GQR Datasheet(PDF) 51 Page - Silicon Laboratories |
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C8051F040-GQR Datasheet(HTML) 51 Page - Silicon Laboratories |
51 / 328 page ![]() C8051F040/1/2/3/4/5/6/7 Rev. 1.5 51 SFR Definition 5.3. AMX0PRT: Port 3 Pin Selection Bit7: PAIN7EN: Pin 7 Analog Input Enable Bit 0: P3.7 is not selected as an analog input to the AMUX. 1: P3.7 is selected as an analog input to the AMUX. Bit6: PAIN6EN: Pin 6 Analog Input Enable Bit 0: P3.6 is not selected as an analog input to the AMUX. 1: P3.6 is selected as an analog input to the AMUX. Bit5: PAIN5EN: Pin 5 Analog Input Enable Bit 0: P3.5 is not selected as an analog input to the AMUX. 1: P3.5 is selected as an analog input to the AMUX. Bit4: PAIN4EN: Pin 4 Analog Input Enable Bit 0: P3.4 is not selected as an analog input to the AMUX. 1: P3.4 is selected as an analog input to the AMUX. Bit3: PAIN3EN: Pin 3 Analog Input Enable Bit 0: P3.3 is not selected as an analog input to the AMUX. 1: P3.3 is enabled as an analog input to the AMUX. Bit2: PAIN2EN: Pin 2 Analog Input Enable Bit 0: P3.2 is not selected as an analog input to the AMUX. 1: P3.2 is enabled as an analog input to the AMUX. Bit1: PAIN1EN: Pin 1 Analog Input Enable Bit 0: P3.1 is not selected as an analog input to the AMUX. 1: P3.1 is enabled as an analog input to the AMUX. Bit0: PAIN0EN: Pin 0 Analog Input Enable Bit 0: P3.0 is not selected as an analog input to the AMUX. 1: P3.0 is enabled as an analog input to the AMUX. Note:Any number of Port 3 pins may be selected simultaneously inputs to the AMUX. Odd numbered and even numbered pins that are selected simultaneously are shorted together as “wired-OR”. R/W R/W R/W R/W R/W R/W R/W R/W Reset Value PAIN7EN PAIN6EN PAIN5EN PAIN4EN PAIN3EN PAIN2EN PAIN1EN PAIN0EN 00000000 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 SFR Address: SFR Page: 0xBD 0 |
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