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C8051F040-GQR Datasheet(PDF) 9 Page - Silicon Laboratories |
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C8051F040-GQR Datasheet(HTML) 9 Page - Silicon Laboratories |
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9 / 328 page  C8051F040/1/2/3/4/5/6/7 Rev. 1.5 9 List of Figures 1. System Overview Figure 1.1. C8051F040/2 Block Diagram ................................................................. 21 Figure 1.2. C8051F041/3 Block Diagram ................................................................. 22 Figure 1.3. C8051F044/6 Block Diagram ................................................................. 23 Figure 1.4. C8051F045/7 Block Diagram ................................................................. 24 Figure 1.5. Comparison of Peak MCU Execution Speeds ....................................... 25 Figure 1.6. On-Board Clock and Reset .................................................................... 26 Figure 1.7. On-Chip Memory Map............................................................................ 27 Figure 1.8. Development/In-System Debug Diagram............................................... 28 Figure 1.9. Digital Crossbar Diagram ....................................................................... 29 Figure 1.10. PCA Block Diagram.............................................................................. 30 Figure 1.11. CAN Controller Diagram....................................................................... 31 Figure 1.12. 10/12-Bit ADC Block Diagram .............................................................. 32 Figure 1.13. 8-Bit ADC Diagram............................................................................... 33 Figure 1.14. Comparator and DAC Diagram ............................................................ 34 2. Absolute Maximum Ratings 3. Global DC Electrical Characteristic 4. Pinout and Package Definitions Figure 4.1. TQFP-100 Pinout Diagram..................................................................... 43 Figure 4.2. TQFP-100 Package Drawing ................................................................. 44 Figure 4.3. TQFP-64 Pinout Diagram....................................................................... 45 Figure 4.4. TQFP-64 Package Drawing ................................................................... 46 5. 12-Bit ADC (ADC0, C8051F040/1 Only) Figure 5.1. 12-Bit ADC0 Functional Block Diagram ................................................. 47 Figure 5.2. Analog Input Diagram ............................................................................ 48 Figure 5.3. High Voltage Difference Amplifier Functional Diagram .......................... 52 Figure 5.4. 12-Bit ADC Track and Conversion Example Timing .............................. 55 Figure 5.5. ADC0 Equivalent Input Circuits.............................................................. 56 Figure 5.6. Temperature Sensor Transfer Function ................................................. 57 Figure 5.7. ADC0 Data Word Example .................................................................... 61 Figure 5.8. 12-Bit ADC0 Window Interrupt Example: Right Justified Single-Ended Data ........................................................ 63 Figure 5.9. 12-Bit ADC0 Window Interrupt Example: Right Justified Differential Data............................................................. 64 Figure 5.10. 12-Bit ADC0 Window Interrupt Example: Left Justified Single-Ended Data........................................................... 65 Figure 5.11. 12-Bit ADC0 Window Interrupt Example: Left Justified Differential Data . 66 6. 10-Bit ADC (ADC0, C8051F042/3/4/5/6/7 Only) Figure 6.1. 10-Bit ADC0 Functional Block Diagram ................................................. 69 Figure 6.2. Analog Input Diagram ............................................................................ 70 Figure 6.3. High Voltage Difference Amplifier Functional Diagram .......................... 74 Figure 6.4. 10-Bit ADC Track and Conversion Example Timing .............................. 77 |
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