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C8051F040-GQR Datasheet(PDF) 97 Page - Silicon Laboratories

Part No. C8051F040-GQR
Description  Mixed Signal ISP Flash MCU Family
Download  328 Pages
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Manufacturer  SILABS [Silicon Laboratories]
Direct Link  http://www.silabs.com
Logo SILABS - Silicon Laboratories

C8051F040-GQR Datasheet(HTML) 97 Page - Silicon Laboratories

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C8051F040/1/2/3/4/5/6/7
Rev. 1.5
97
SFR Definition 7.3. ADC2CF: ADC2 Configuration
Bits7-3:
AD2SC4-0: ADC2 SAR Conversion Clock Period Bits
SAR Conversion clock is derived from system clock by the following equation, where
AD2SC refers to the 5-bit value held in AD2SC4-0. SAR conversion clock requirements are
given in Table 7.2.
*
or
*Note: AD2SC is the rounded-up result.
Bit2:
UNUSED. Read = 0b. Write = don’t care.
Bits1-0:
AMP2GN1-0: ADC2 Internal Amplifier Gain (PGA)
00: Gain = 0.5
01: Gain = 1
10: Gain = 2
11: Gain = 4
R/W
R/W
R/W
R/W
R/W
R
R/W
R/W
Reset Value
AD2SC4
AD2SC3
AD2SC2
AD2SC1
AD2SC0
-
AMP2GN1 AMP2GN0 11111000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address:
SFR Page:
0xBC
2
AD2SC
SYSCLK
CLK
SAR2
-----------------------
1
–
CLK
SAR2
SYSCLK
AD2SC
1
+
---------------------------- –
=


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