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C8051F040-GQR Datasheet(PDF) 27 Page - Silicon Laboratories

Part # C8051F040-GQR
Description  Mixed Signal ISP Flash MCU Family
Download  328 Pages
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Manufacturer  SILABS [Silicon Laboratories]
Direct Link  http://www.silabs.com
Logo SILABS - Silicon Laboratories

C8051F040-GQR Datasheet(HTML) 27 Page - Silicon Laboratories

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C8051F040/1/2/3/4/5/6/7
Rev. 1.5
27
1.2.
On-Chip Memory
The CIP-51 has a standard 8051 program and data address configuration. It includes 256 bytes of data
RAM, with the upper 128 bytes dual-mapped. Indirect addressing accesses the upper 128 bytes of general
purpose RAM, and direct addressing accesses the 128 byte SFR address space. The CIP-51 SFR
address space contains up to 256 SFR Pages. In this way, the CIP-51 MCU can accommodate the many
SFRs required to control and configure the various peripherals featured on the device. The lower
128 bytes of RAM are accessible via direct and indirect addressing. The first 32 bytes are addressable as
four banks of general purpose registers, and the next 16 bytes can be byte addressable or bit addressable.
The CIP-51 in the C8051F04x MCUs additionally has an on-chip 4 kB RAM block and an external memory
interface (EMIF) for accessing off-chip data memory or memory-mapped peripherals. The on-chip 4 byte
block can be addressed over the entire 64 kB external data memory address range (overlapping 4 kB
boundaries). External data memory address space can be mapped to on-chip memory only, off-chip mem-
ory only, or a combination of the two (addresses up to 4 kB directed to on-chip, above 4 kB directed to
EMIF). The EMIF is also configurable for multiplexed or non-multiplexed address/data lines.
The MCU's program memory consists of 64 kB (C8051F040/1/2/3/4/5) or 32 kB (C8051F046/7) of Flash.
This memory may be reprogrammed in-system in 512 byte sectors, and requires no special off-chip pro-
gramming voltage. The 512 bytes from addresses 0xFE00 to 0xFFFF are reserved for the 64 kB devices.
There is also a single 128 byte sector at address 0x10000 to 0x1007F, which may be useful as a small
table for software constants. See Figure 1.7 for the MCU system memory map.
Figure 1.7. On-Chip Memory Map
PROGRAM/DATA MEMORY
(FLASH)
(Direct and Indirect
Addressing)
0x00
0x7F
Upper 128 RAM
(Indirect Addressing
Only)
0x80
0xFF
Special Function
Registers
(Direct Addressing Only)
DATA MEMORY (RAM)
General Purpose
Registers
0x1F
0x20
0x2F
Bit Addressable
Lower 128 RAM
(Direct and Indirect
Addressing)
0x30
INTERNAL DATA ADDRESS SPACE
EXTERNAL DATA ADDRESS SPACE
XRAM - 4096 Bytes
(accessable using MOVX
instruction)
0x0000
0x0FFF
Off-chip XRAM space
0x1000
0xFFFF
64 kB
Flash
(In-System
Programmable in 512
Byte Sectors)
0x0000
RESERVED
0xFE00
0xFDFF
Scrachpad Memory
(DATA only)
0x1007F
0x10000
Up To
256 SFR Pages
1
3
0
2
F
C8051F040/1/2/3/4/5
32 kB
Flash
(In-System
Programmable in 512
Byte Sectors)
0x0000
RESERVED
0x8000
0x7FFF
Scrachpad Memory
(DATA only)
0x1007F
0x10000
C8051F046/7


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