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AD7628KP Datasheet(PDF) 2 Page - Analog Devices |
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AD7628KP Datasheet(HTML) 2 Page - Analog Devices |
2 / 8 page TA = –40 CTA = –55 C Parameter TA = +25 C 1 to +85 C to +125 C 1 Units Test Conditions/Comments STATIC PERFORMANCE 2 Resolution 8 8 8 Bits Relative Accuracy ± 1/2 ± 1/2 ± 1/2 LSB max This is an Endpoint Linearity Specification Differential Nonlinearity ± 1 ± 1 ± l LSB max All Grades Guaranteed Monotonic Over Full Operating Temperature Range Gain Error ± 2 ± 3 ± 3 LSB max Measured Using Internal RFB A and RFB B. Both DAC Latches Loaded with 11111111. Gain Error is Adjustable Using Circuits of Figures 4 and 5. Gain Temperature Coefficient 3 ∆Gain/∆Temperature ± 0.0035 ± 0.0035 %/ °C max Output Leakage Current OUT A (Pin 2) ± 50 ± 200 ± 200 nA max DAC Latches Loaded with 00000000 OUT B (Pin 20) ± 50 ± 200 ± 200 nA max Input Resistance (VREFA, VREFB) 88 8k Ω min Input Resistance TC = –300 ppm/ °C, Typical 15 15 15 k Ω max Input Resistance is 11 k Ω VREFA/VREFB Input Resistance Match ± 1 ± 1 ± 1 % max DIGITAL INPUTS 4 Input High Voltage (VIH) 2.4 2.4 2.4 V min Input Low Voltage (VIL) 0.8 0.8 0.8 V max Input Current (IIN) ± 1 ± 10 ± 10 µA max VIN = 0 or VDD Input Capacitance DB0–DB7 10 10 10 pF max WR, CS, DACA/DACB 15 15 15 pF max SWITCHING CHARACTERISTICS 3 See Timing Diagram Chip Select to Write Set Up Time (tCS) 160 160 210 ns min Chip Select to Write Hold Time (tCH) 10 10 10 ns min DAC Select to Write Set Up Time (tAS) 160 160 210 ns min DAC Select to Write Hold Time (tAH) 10 10 10 ns min Data Valid to Write Set Up Time (tDS) 160 160 210 ns min Data Valid to Write Hold Time (tDH) 10 10 10 ns min Write Pulse Width (tWR) 150 170 210 ns min POWER SUPPLY See Figure 3 IDD, K Grade 2 2 mA All Digital Inputs VIL or VIH B, T Grades 2 2.5 2.5 mA All Digital Inputs VIL or VIH All Grades 100 500 500 µA All Digital Inputs 0 V or VDD Specifications subject to change without notice. AC PERFORMANCE CHARACTERISTICS TA = –40 CTA = –55 C Parameter TA = +25 C 1 to +85 C 1 to +125 πC1 Units Test Conditions/Comments DC SUPPLY REJECTION ( ∆GAIN/∆V DD) 0.01 0.02 0.02 % per % max ∆V DD = ± 5% CURRENT SETTLING TIME 350 400 400 ns max To 1/2 LSB OutA/OutB Load = 100 Ω. WR = CS = 0 V. DB0–DB7 = 0 V to VDD or VDD to 0 V DIGITAL-TO-ANALOG GLITCH IMPULSE 330 nV sec typ For Code Transition 00000000 to 11111111 OUTPUT CAPACITANCE COUTA 25 25 25 pF max DAC Latches Loaded with 00000000 COUTB 25 25 25 pF max COUTA 60 60 60 pF max DAC Latches Loaded with 11111111 COUTB 60 60 60 pF max AC FEEDTHROUGH VREFA to OUT A –70 –65 –65 dB max VREFA, VREFB = 20 V p-p Sine Wave VREFB to OUT B –70 –65 –65 dB max @ 10 kHz CHANNEL-TO-CHANNEL ISOLATION Both DAC Latches Loaded with 11111111. VREFA to OUT B –80 dB typ VREFA = 20 V p-p Sine Wave @ 10 kHz VREFB = 0 V See Figure 6. VREFB to OUTA –80 dB typ VREFB = 20 V p-p Sine Wave @ 10 kHz VREFA = 0 V See Figure 6. DIGITAL CROSSTALK 60 nV sec typ Measured for Code Transition 00000000 to 11111111 HARMONIC DISTORTION –85 dB typ VIN = 6 V rms @ 1 kHz NOTES 1Temperature Ranges are K Version; –40 °C to +85°C; B Version; –40°C to +85°C; T Version; –55°C to +125°C. 2Specification applies to both DACs in AD7628. 3Guaranteed by design but not production tested. 4Logic inputs are MOS Gates. Typical input current (+25 °C) is less than 1 nA. Specifications subject to change without notice. REV. A –2– AD7628–SPECIFICATIONS (VDD = +10.8 V to +15.75 V, VREF A = VREF B = +10 V; OUT A = OUT B = 0 V unless otherwise noted) These characteristics are included for Design Guidance only and are not subject to test. VDD = +10.8 V to +15.75 V. (Measured Using Recommended PC Board Layout (Figure 7) and AD644 as Output Amplifiers) |
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