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ADS8881IDGS Datasheet(PDF) 6 Page - Texas Instruments |
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ADS8881IDGS Datasheet(HTML) 6 Page - Texas Instruments |
6 / 44 page D17 D16 D1 D0 1 2 17 18 D2 D15 16 DOUT SCLK DIN 3 CONVST 1/fsample tACQ tconv-max td-DI-DO twl-CNV tsu-DI-CNV td-DI-DOhz twh-DI-min ADS8881 SBAS547A – MAY 2013 – REVISED JULY 2013 www.ti.com 4-WIRE OPERATION Figure 2. 4-Wire Operation: DIN Functions as Chip Select NOTE Figure 2 shows the timing diagram for the 4-Wire CS Mode Without a Busy Indicator interface option. However, the timing parameters specified in Table 2 are also applicable for the 4-Wire CS Mode With a Busy Indicator interface option, unless otherwise specified. Refer to the Digital Interface section for specific details for each interface option. Table 2. TIMING REQUIREMENTS: 4-Wire Operation(1) PARAMETER MIN TYP MAX UNIT tACQ Acquisition time 290 ns tconv Conversion time 500 710 ns 1/fsample Time between conversions 1000 ns twh-DI Pulse duration: DIN high 10 ns twl-CNV Pulse width: CONVST low 20 ns td-DI-DO Delay time: DIN low to MSB valid 12.3 ns td-DI-DOhz Delay time: DIN high or last SCLK falling edge to DOUT 3-state 13.2 ns tsu-DI-CNV Setup time: DIN high to CONVST rising edge 7.5 ns th-DI-CNV Hold time: DIN high from CONVST rising edge (see Figure 62) 0 ns (1) All specifications are at TA = –40°C to +85°C, AVDD = 3 V, and DVDD = 3 V, unless otherwise noted. 6 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: ADS8881 |
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