Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.NET

X  

Preview PDF Download HTML

EP2C8T144I8N Datasheet(PDF) 67 Page - Altera Corporation

Part No. EP2C8T144I8N
Description  Cyclone II Device Handbook, Volume 1
Download  470 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  ALTERA [Altera Corporation]
Direct Link  http://www.altera.com
Logo ALTERA - Altera Corporation

EP2C8T144I8N Datasheet(HTML) 67 Page - Altera Corporation

Back Button EP2C8T144I8N Datasheet HTML 63Page - Altera Corporation EP2C8T144I8N Datasheet HTML 64Page - Altera Corporation EP2C8T144I8N Datasheet HTML 65Page - Altera Corporation EP2C8T144I8N Datasheet HTML 66Page - Altera Corporation EP2C8T144I8N Datasheet HTML 67Page - Altera Corporation EP2C8T144I8N Datasheet HTML 68Page - Altera Corporation EP2C8T144I8N Datasheet HTML 69Page - Altera Corporation EP2C8T144I8N Datasheet HTML 70Page - Altera Corporation EP2C8T144I8N Datasheet HTML 71Page - Altera Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 67 / 470 page
background image
Altera Corporation
2–41
February 2007
Cyclone II Device Handbook, Volume 1
Cyclone II Architecture
The pin’s datain signals can drive the logic array. The logic array drives
the control and data signals, providing a flexible routing resource. The
row or column IOE clocks, io_clk[5..0], provide a dedicated routing
resource for low-skew, high-speed clocks. The global clock network
generates the IOE clocks that feed the row or column I/O regions (see
“Global Clock Network & Phase-Locked Loops” on page 2–16).
Figure 2–23 illustrates the signal paths through the I/O block.
Figure 2–23. Signal Path Through the I/O Block
Each IOE contains its own control signal selection for the following
control signals: oe, ce_in, ce_out, aclr/preset, sclr/preset,
clk_in
, and clk_out. Figure 2–24 illustrates the control signal
selection.
Row or Column
io_clk[5..0]
io_datain0
io_datain1
io_dataout
io_coe
oe
ce_in
ce_out
io_cce_in
aclr/preset
io_cce_out
sclr/preset
io_caclr
clk_in
io_cclk
clk_out
dataout
Data and
Control
Signal
Selection
IOE
To Logic
Array
From Logic
Array
To Other
IOEs
io_csclr


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37  38  39  40  41  42  43  44  45  46  47  48  49  50  51  52  53  54  55  56  57  58  59  60  61  62  63  64  65  66  67  68  69  70  71  72  73  74  75  76  77  78  79  80  81  82  83  84  85  86  87  88  89  90  91  92  93  94  95  96  97  98  99  100   ...More


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.NET
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn