EP3C10F256I7N datasheet(27/34 Pages) ALTERA

Part #	EP3C10F256I7N

Description	1. Cyclone III Device Datasheet

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Manufacturer	ALTERA [Altera Corporation]

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27 / 34 page

Chapter 1: Cyclone III Device Datasheet

1–27

Glossary

July 2012

Altera Corporation

Cyclone III Device Handbook

Volume 2

f The Excel-based I/O Timing spreadsheet is downloadable from Cyclone III Devices

Literature website.

Glossary

Table 1–39 lists the glossary for this chapter.

Table 1–39. Glossary (Part 1 of 5)

Letter

Term

Definitions

A

——

B

——

C

——

D

——

E

——

F

fHSCLK

HIGH-SPEED I/O Block: High-speed receiver/transmitter input and output clock frequency.

G

GCLK

Input pin directly to Global Clock network.

GCLK PLL

Input pin to Global Clock network through PLL.

H

HSIODR

HIGH-SPEED I/O Block: Maximum/minimum LVDS data transfer rate (HSIODR = 1/TUI).

I

Input Waveforms

for the SSTL

Differential I/O

Standard

J

JTAG Waveform

K

——

L

——

M

——

V

IL

V

REF

V

IH

VSWING

TDO

TCK

tJPZX

t

JPCO

t

JSCO

t

JSXZ

tJPH

tJSH

t JPXZ

tJCP

tJPSU_TMS

t JCL

tJCH

TDI

TMS

Signal

to be

Captured

Signal

to be

Driven

tJPSU_TDI

tJSZX

tJSSU

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