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TNY375G Datasheet(PDF) 10 Page - Power Integrations, Inc. |
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TNY375G Datasheet(HTML) 10 Page - Power Integrations, Inc. |
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10 / 22 page  Rev. C 09/12 10 TNY375-380 www.powerint.com should be located as close as possible to the SOURCE and BYPASS pins of the device. For best performance of the OVP function, it is recommended that a relatively high bias winding voltage is used, in the range of 15 V-30 V. This minimizes the error voltage on the bias winding due to leakage inductance and also ensures adequate voltage during no-load operation from which to supply the IC device consumption. Selecting the Zener diode voltage to be approximately 6 V above the bias winding voltage (28 V for 22 V bias winding) gives good OVP performance for most designs but can be adjusted to compensate for variations in leakage inductance. Adding additional filtering can be achieved by inserting a low value (10 W to 47 W) resistor in series with the bias winding diode and/or the OVP Zener, as shown by R4 and R5 in Figure 15. The resistor in series with the OVP Zener also limits the maximum current into the BYPASS pin. Reducing No-load Consumption With the exception of the TNY375 and TNY376, a bias winding must be used to provide supply current for the IC. This has the additional benefit of reducing the typical no-load consumption to <60 mW. Select the value of the resistor (R6 in Figure 15) to provide the data sheet supply current equal to I S2 + |IDIS|. Although in practice the bias voltage falls at low load, the reduction in supply current through R6 is balanced against the reduced IC consumption as the effective switching frequency reduces with load. Audible Noise The cycle skipping mode of operation used in the TinySwitch-PK devices can generate audio frequency components in the transformer. To limit this audible noise generation, the transformer should be designed such that the peak core flux density is below 3000 Gauss (300 mT). Following this guideline, and using the standard transformer production technique of dip varnishing practically eliminates audible noise. Vacuum impregnation of the transformer should not be used due to the high primary capacitance and increased losses that results. Ceramic capacitors that use dielectrics such as Z5U, when used in clamp circuits, may also generate audio noise. If this is the case, try replacing them with a capacitor having a different dielectric or construction such as the film foil or metallized foil type. TinySwitch-PK Layout Considerations Single Point Grounding Use a single point ground connection from the input filter capacitor to the area of copper connected to the SOURCE pins. When used as an auxiliary supply in a larger converter, a local DC bus decoupling capacitor is recommended. A value of 100 nF is typical. The bias winding should be returned directly to the input or decoupling capacitor. This routes surge currents away from the device during common mode line surge events. Bypass Capacitor (C BP) The BYPASS pin capacitor should be located as near as possible to the BYPASS and SOURCE pins using a Kelvin connection. No power current should flow through traces connected to the BYPASS pin capacitor or optocoupler. If using SMD components, a capacitor can be placed underneath the package directly between BP and SOURCE pins. When using a capacitor value of 1 mF or 10 mF to select the reduced or increased current limit mode, it is recommended that an additional 0.1 mF ceramic capacitor is placed directly between BP and SOURCE pins. Enable/Undervoltage Pin Node Connections The EN/UV pin is a low-current, low-voltage pin, and noise coupling can cause poor regulation and/or inaccurate line UV levels. Traces connected to the EN/UV pin must be routed away from any high current or high-voltage switching nodes, including the drain pin and clamp components. This also applies to the placement of the line undervoltage sense resistor (R UV). Drain connected traces must not be routed underneath this component. TinySwitch-PK determines the presence of the UV resistor via a ~1 mA current into the EN/UV pin at startup. When the under- voltage feature is not used ensure that leakage current into the EN/UV pin is <<1 mA. This prevents false detection of the presence of a UV resistor which may prevent correct start-up. As the use of no-clean flux may increase leakage currents (by reducing surface resistivity) care should be taken to follow the flux suppliers guidance, specifically avoiding flux contamination. Placing a 100 kW, 5% resistor between BP and EN/UV pins eliminates this requirement by feeding current >I LUV(MAX) into the EN/UV pin. Primary Loop Area The area of the primary loop that connects the input filter capacitor, transformer primary, and TinySwitch-PK device should be kept as small as possible. Primary Clamp Circuit A clamp is used to limit peak voltage on the DRAIN pin at turn off. This can be achieved by using an RCD clamp or a Zener and diode clamp across the primary winding. In all cases, to minimize EMI, care should be taken to minimize the loop length from the clamp components to the transformer and the TinySwitch-PK device. Thermal Considerations The four SOURCE pins are internally connected to the IC lead frame and provide the main path to remove heat from the device. Therefore all the SOURCE pins should be connected to a copper area underneath the TinySwitch-PK integrated circuit to act not only as a single point ground, but also as a heat sink. As this area is connected to the quiet source node, it should be maximized for good heat sinking. Similarly, for axial output diodes, maximize the PCB area connected to the cathode. |
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