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TNY267P Datasheet(PDF) 3 Page - Power Integrations, Inc. |
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TNY267P Datasheet(HTML) 3 Page - Power Integrations, Inc. |
3 / 22 page Rev. H 02/09 3 TNY263-268 www.powerint.com Figure 4. Frequency Jitter. TinySwitch-II Functional Description TinySwitch-II combines a high voltage power MOSFET switch with a power supply controller in one device. Unlike conventional PWM (pulse width modulator) controllers, TinySwitch-II uses a simple ON/OFF control to regulate the output voltage. The TinySwitch-II controller consists of an oscillator, enable circuit (sense and logic), current limit state machine, 5.8 V regulator, BYPASS pin undervoltage circuit, over- temperature protection, current limit circuit, leading edge blanking and a 700 V power MOSFET. TinySwitch-II incorporates additional circuitry for line undervoltage sense, auto-restart and frequency jitter. Figure 2 shows the functional block diagram with the most important features. Oscillator The typical oscillator frequency is internally set to an average of 132 kHz. Two signals are generated from the oscillator: the maximum duty cycle signal (DC MAX) and the clock signal that indicates the beginning of each cycle. The TinySwitch-II oscillator incorporates circuitry that introduces a small amount of frequency jitter, typically 8 kHz peak-to-peak, to minimize EMI emission. The modulation rate of the frequency jitter is set to 1 kHz to optimize EMI reduction for both average and quasi-peak emissions. The frequency jitter should be measured with the oscilloscope triggered at the falling edge of the DRAIN waveform. The waveform in Figure 4 illustrates the frequency jitter of the TinySwitch-II. Enable Input and Current Limit State Machine The enable input circuit at the EN/UV pin consists of a low impedance source follower output set at 1.0 V. The current through the source follower is limited to 240 μA. When the current out of this pin exceeds 240 μA, a low logic level (disable) is generated at the output of the enable circuit. This enable circuit output is sampled at the beginning of each cycle on the rising edge of the clock signal. If high, the power MOSFET is turned on for that cycle (enabled). If low, the power MOSFET remains off (disabled). Since the sampling is done only at the beginning of each cycle, subsequent changes in the EN/UV pin voltage or current during the remainder of the cycle are ignored. The current limit state machine reduces the current limit by discrete amounts at light loads when TinySwitch-II is likely to switch in the audible frequency range. The lower current limit raises the effective switching frequency above the audio range and reduces the transformer flux density, including the associated audible noise. The state machine monitors the sequence of EN/UV pin voltage levels to determine the load condition and adjusts the current limit level accordingly in discrete amounts. Under most operating conditions (except when close to no- load), the low impedance of the source follower keeps the voltage on the EN/UV pin from going much below 1.0 V in the disabled state. This improves the response time of the optocoupler that is usually connected to this pin. 5.8 V Regulator and 6.3 V Shunt Voltage Clamp The 5.8 V regulator charges the bypass capacitor connected to the BYPASS pin to 5.8 V by drawing a current from the voltage on the DRAIN pin whenever the MOSFET is off. The BYPASS pin is the internal supply voltage node for the TinySwitch-II. When the MOSFET is on, the TinySwitch-II operates from the energy stored in the bypass capacitor. Extremely low power consumption of the internal circuitry allows TinySwitch-II to operate continuously from current it takes from the DRAIN pin. A bypass capacitor value of 0.1 μF is sufficient for both high frequency decoupling and energy storage. In addition, there is a 6.3 V shunt regulator clamping the BYPASS pin at 6.3 V when current is provided to the BYPASS pin through an external resistor. This facilitates powering of TinySwitch-II externally through a bias winding to decrease the no-load consumption to about 50 mW. BYPASS Pin Undervoltage The BYPASS pin undervoltage circuitry disables the power MOSFET when the BYPASS pin voltage drops below 4.8 V. Once the BYPASS pin voltage drops below 4.8 V, it must rise back to 5.8 V to enable (turn-on) the power MOSFET. Over Temperature Protection The thermal shutdown circuitry senses the die temperature. The threshold is typically set at 135 °C with 70 °C hysteresis. When the die temperature rises above this threshold the power MOSFET is disabled and remains disabled until the die temperature falls by 70 °C, at which point it is re-enabled. A large hysteresis of 70 °C (typical) is provided to prevent overheating of the PC board due to a continuous fault condition. Current Limit The current limit circuit senses the current in the power MOSFET. When this current exceeds the internal threshold (I LIMIT), the power MOSFET is turned off for the remainder of 600 05 10 136 kHz 128 kHz V DRAIN Time ( μs) 500 400 300 200 100 0 |
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