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AGL125V5-FGG144ES Datasheet(PDF) 3 Page - Microsemi Corporation |
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AGL125V5-FGG144ES Datasheet(HTML) 3 Page - Microsemi Corporation |
3 / 250 page IGLOO Low Power Flash FPGAs Revision 23 III IGLOO Ordering Information Note: Marking Information: IGLOO V2 devices do not have V2 marking, but IGLOO V5 devices are marked accordingly. Supply Voltage 2 = 1.2 V to 1.5 V 5 = 1.5 V only AGL1000 V2 FG _ Part Number IGLOO Devices Package Type VQ = Very Thin Quad Flat Pack (0.5 mm pitch) QN = Quad Flat Pack No Leads (0.4 mm and 0.5 mm pitch) 144 I Y Package Lead Count Y = Device Includes License to Implement IP Based on the Cryptography Research, Inc. (CRI) Patent Portfolio G Lead-Free Packaging Application (Temperature Range) Security Feature Blank = Commercial (0°C to +70°C Ambient Temperature) I = Industrial ( –40°C to +85°C Ambient Temperature) Blank = Standard Packaging G= RoHS-Compliant Packaging (some packages also halogen-free) PP = Pre-Production ES = Engineering Sample (Room Temperature Only) 30,000 System Gates AGL030 = 15,000 System Gates AGL015 = 60,000 System Gates AGL060 = 125,000 System Gates AGL125 = 250,000 System Gates AGL250 = 600,000 System Gates AGL600 = 400,000 System Gates AGL400 = 1,000,000 System Gates AGL1000 = CS = Chip Scale Package (0.4 mm and 0.5 mm pitches) UC = Micro Chip Scale Package (0.4 mm pitch) FG = Fine Pitch Ball Grid Array (1.0 mm pitch) IGLOO Devices with Cortex-M1 250,000 System Gates M1AGL250 = 600,000 System Gates M1AGL600 = 1,000,000 System Gates M1AGL1000 = Blank = Device Does Not Include License to Implement IP Based on the Cryptography Research, Inc. (CRI) Patent Portfolio |
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