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IS64WV5128EDBLL-10CTLA3 Datasheet(PDF) 2 Page - Integrated Silicon Solution, Inc |
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IS64WV5128EDBLL-10CTLA3 Datasheet(HTML) 2 Page - Integrated Silicon Solution, Inc |
2 / 14 page 2 Integrated Silicon Solution, Inc. — www.issi.com Rev. B 11/08/2011 IS61/64WV5128EDBLL PIN CONFIGURATION (HIGH SPEED) (61/64WV5128ALL/BLL) 36 mini BGA PIN DESCRIPTIONS A0-A18 AddressInputs CE ChipEnableInput OE OutputEnableInput WE WriteEnableInput I/O0-I/O7 BidirectionalPorts Vdd Power GND Ground NC NoConnection 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 A0 A1 A2 A3 A4 CE I/O0 I/O1 VDD GND I/O2 I/O3 WE A5 A6 A7 A8 A9 NC A18 A17 A16 A15 OE I/O7 I/O6 GND VDD I/O5 I/O4 A14 A13 A12 A11 A10 NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 NC NC A0 A1 A2 A3 A4 CE I/O0 I/O1 VDD GND I/O2 I/O3 WE A5 A6 A7 A8 A9 NC NC NC NC NC A18 A17 A16 A15 OE I/O7 I/O6 GND VDD I/O5 I/O4 A14 A13 A12 A11 A10 NC NC NC 44 43 42 41 44-Pin TSOP (Type II) 1 2 3 4 5 6 A B C D E F G H A0 I/O4 I/O5 GND VDD I/O6 I/O7 A9 A1 A2 OE A10 NC WE NC A18 CE A11 A3 A4 A5 A17 A16 A12 A6 A7 A15 A13 A8 I/O0 I/O1 VDD GND I/O2 I/O3 A14 36-Pin SOJ |
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