GC5330

GC5337

SLWS226 B

– DECEMBER 2010 – REVISED JANUARY 2011

www.ti.com

In WI applications, the GC533x meets multi-carrier 3G and 4G performance standards (PCDE, composite EVM,

and ACLR) at PAR levels down to 6 dB for WCDMA and 7 dB for LTE, and improves the ACLR by over 20 dB at

the PA output. The GC533x integrates easily into the transmit/receive signal chain between Texas Instruments

’

high-performance data converters and baseband processors such as the TI TMS320C64xx family. In wireless

repeater applications, the GC533x can provide seamless interfaces to TI data converters, along with receive and

transmit filtering, DDC, and DUC functions.

The GC533x is extremely flexible and can be used in system architectures with different signal types and

TX-by-RX antenna configurations such as 2

×2, 2×4, 4×4, and 4×8.

The GC533x EVM system provides an example sector transmit-receive signal chain solution, from the

multi-carrier baseband to the RF antenna.

ABSOLUTE MAXIMUM RATINGS

over recommended operating free-air temperature range (unless otherwise noted)

(1)

MIN

MAX

UNIT

Core supply voltage

–0.3

1.32

V

PLL analog voltage

–0.3

2

V

Digital supply voltage for TX

–0.3

2

V

Digital supply voltage

–0.3

3.6

V

Input voltage (under/overshoot)

–0.5

V

Clamp current for an input/output

–20

20

mA

Storage temperature

–65

140

°C

ESD classification

Class 2 (2.5 kV HBM, 500 V CDM, 150 V MM)

Moisture sensitivity

Moisture sensitivity Class 3 (1 week floor life at 30

°C / 60% H)

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating

Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

RECOMMENDED OPERATING CONDITIONS

MIN

TYP

MAX

UNIT

1.05

1.1

1.15

V

1.1

1.125

1.15

Analog supply for PLLs

1.71

1.8

1.89

Digital supply voltage for LVDS I/O

1.71

1.8

1.89

V

Digital supply voltage CMOS I/O

PC board design dependent

3.15

3.3

3.45

V

Case temperature

–40

30

90

°C

Junction temperature

105

°C

(1)

Production tested hot using checksum at 310 MHz and maximum supplies. Power scales linearly with frequency with a dc consumption

around 350 mA typical, 700 mA worst case.

(2)

Chip specifications are production tested to 90

°C case temperature. QA tests are performed at 85°C.

(3)

Power consumption is a strong function of the configuration. A calculator is available to estimate power for a specific configuration.

(4)

Reliability calculations presume junction temperature 105

°C or below. Operation above 105°C junction temperature reduces product

lifetime.

8

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