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EP2C8AT324I7N Datasheet(PDF) 66 Page - Altera Corporation

Part No. EP2C8AT324I7N
Description  Section I. Cyclone II Device Family Data Sheet
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Manufacturer  ALTERA [Altera Corporation]
Direct Link  http://www.altera.com
Logo ALTERA - Altera Corporation

EP2C8AT324I7N Datasheet(HTML) 66 Page - Altera Corporation

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Altera Corporation
Cyclone II Device Handbook, Volume 1
February 2007
I/O Structure & Features
The reduced swing differential signaling (RSDS) and mini-LVDS
standards are derivatives of the LVDS standard. The RSDS and
mini-LVDS I/O standards are similar in electrical characteristics to
LVDS, but have a smaller voltage swing and therefore provide increased
power benefits and reduced electromagnetic interference (EMI).
Cyclone II devices support the RSDS and mini-LVDS I/O standards at
data rates up to 311 Mbps at the transmitter.
A subset of pins in each I/O bank (on both rows and columns) support
the high-speed I/O interface. The dual-purpose LVDS pins require an
external-resistor network at the transmitter channels in addition to 100-
Ω
termination resistors on receiver channels. These pins do not contain
dedicated serialization or deserialization circuitry. Therefore, internal
logic performs serialization and deserialization functions.
Cyclone II pin tables list the pins that support the high-speed I/O
interface. The number of LVDS channels supported in each device family
member is listed in Table 2–18.
Table 2–18. Cyclone II Device LVDS Channels (Part 1 of 2)
Device
Pin Count
Number of LVDS
Channels (1)
EP2C5
144
31 (35)
208
56 (60)
256
61 (65)
EP2C8
144
29 (33)
208
53 (57)
256
75 (79)
EP2C15
256
52 (60)
484
128 (136)
EP2C20
240
45 (53)
256
52 (60)
484
128 (136)
EP2C35
484
131 (139)
672
201 (209)
EP2C50
484
119 (127)
672
189 (197)


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