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EP2C8AT324C8N Datasheet(PDF) 61 Page - Altera Corporation

Part No. EP2C8AT324C8N
Description  Section I. Cyclone II Device Family Data Sheet
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Manufacturer  ALTERA [Altera Corporation]
Direct Link  http://www.altera.com
Logo ALTERA - Altera Corporation

EP2C8AT324C8N Datasheet(HTML) 61 Page - Altera Corporation

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Altera Corporation
2–49
February 2007
Cyclone II Device Handbook, Volume 1
Cyclone II Architecture
Programmable Drive Strength
The output buffer for each Cyclone II device I/O pin has a programmable
drive strength control for certain I/O standards. The LVTTL, LVCMOS,
SSTL-2 class I and II, SSTL-18 class I and II, HSTL-18 class I and II, and
HSTL-1.5 class I and II standards have several levels of drive strength that
you can control. Using minimum settings provides signal slew rate
control to reduce system noise and signal overshoot. Table 2–16 shows
the possible settings for the I/O standards with drive strength control.
Table 2–16. Programmable Drive Strength (Part 1 of 2)
Note (1)
I/O Standard
IOH/IOL Current Strength Setting (mA)
Top & Bottom I/O Pins
Side I/O Pins
LVTTL (3.3 V)
4
4
88
12
12
16
16
20
20
24
24
LVCMOS (3.3 V)
4
4
88
12
12
16
20
24
LVTTL/LVCMOS (2.5 V)
4
4
88
12
16
LVTTL/LVCMOS (1.8 V)
2
2
44
66
88
10
10
12
12


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