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EP2C8AT324C8N Datasheet(PDF) 40 Page - Altera Corporation |
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EP2C8AT324C8N Datasheet(HTML) 40 Page - Altera Corporation |
40 / 168 page 2–28 Altera Corporation Cyclone II Device Handbook, Volume 1 February 2007 Embedded Memory Each M4K block can implement various types of memory with or without parity, including true dual-port, simple dual-port, and single-port RAM, ROM, and first-in first-out (FIFO) buffers. The M4K blocks support the following features: ■ 4,608 RAM bits ■ 250-MHz performance ■ True dual-port memory ■ Simple dual-port memory ■ Single-port memory ■ Byte enable ■ Parity bits ■ Shift register ■ FIFO buffer ■ ROM ■ Various clock modes ■ Address clock enable 1 Violating the setup or hold time on the memory block address registers could corrupt memory contents. This applies to both read and write operations. Table 2–5 shows the capacity and distribution of the M4K memory blocks in each Cyclone II device. Table 2–5. M4K Memory Capacity & Distribution in Cyclone II Devices Device M4K Columns M4K Blocks Total RAM Bits EP2C5 2 26 119,808 EP2C8 2 36 165,888 EP2C15 2 52 239,616 EP2C20 2 52 239,616 EP2C35 3 105 483,840 EP2C50 3 129 594,432 EP2C70 5 250 1,152,000 |
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