(

)

SW

40000

f

kHz

R7

=

TPS61197

SLVSC25 – JULY 2013

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DETAILED DESCRIPTION

Supply Voltage

The TPS61197 has a built-in linear regulator to supply the IC analog and logic circuitries. The VDD pin, output of

the regulator, must be connected to a bypass capacitor with more than 1.0µF capacitance. VDD only has a

current sourcing capability of 15mA. VDD voltage is ready after the EN pin is pulled high.

Boost Controller

The TPS61197 regulates the output voltage with peak current mode PWM (pulse width modulation) control. The

control circuitry turns on an external switch FET at the beginning of each switching cycle. The input voltage is

applied across the inductor and stores the energy as the inductor current ramps up. During this portion of the

switching cycle, the load current is provided by the output capacitor. When the inductor current rises to the

threshold set by the Error Amplifier (EA) output, the switch FET is turned off and the external Schottky diode is

forward biased. The inductor transfers stored energy to replenish the output capacitor and supply the load

current. This operation repeats each switching cycle. The switching frequency is programmed by an external

resistor.

A ramp signal from the oscillator is added to the current ramp to provide slope compensation, shown in the

Functional Block Diagram. The duty cycle of the converter is then determined by the PWM logic block which

compares the EA output and the slope compensated current ramp. The feedback loop regulates the OVP pin to

a reference voltage generated by the current regulation control circuit which senses the LED current at the IFB

pin. The output of the EA is connected to the COMP pin. An external RC compensation network must be

connected to the COMP pin to optimize the feedback loop for stability and transient response.

The TPS61197 consistently adjusts the boost output voltage to account for any changes in LED forward

voltages. In the event that the boost controller is not able to regulate the output voltage due to the minimum

this mode, the device keeps the power switch off for several switching cycles to prevent the output voltage from

rising above the regulated voltage. This operation typically occurs in light load condition or when the input voltage

is higher than the output voltage.

Switching Frequency

The switching frequency is programmed between 50kHz to 800kHz by an external resistor (R7 in the

SIMPLIFIED SCHEMATIC CIRCUIT). To determine the resistance by a given frequency, use the curve in

Figure 7 or calculate the resistance value by Equation 1. Table 1 shows the recommended resistance values for

some switching frequencies.

(1)

Table 1. Recommended Resistance Values for

Switching Frequencies

R7

800 k

50 kHz

400 k

100 kHz

200 k

200 kHz

100 k

400 kHz

80 k

500 kHz

Enable and Under Voltage Lockout

The TPS61197 is enabled with soft startup when the EN pin voltage is higher than 1.6V. A voltage of less than

0.75V disables the TPS61197. An under-voltage lockout protection feature is provided in the TPS61197. When

the voltage at the VIN pin is less than 6.5V, the TPS61197 is powered off. The TPS61197 resumes the operation

input voltage. If a higher under-voltage lockout (UVLO) voltage is required, use the UVLO pin as shown in

Figure 18 to adjust the input UVLO threshold by using an external resistor divider. Once the voltage at the UVLO

10

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