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X9258UV24IZ-2.7 Datasheet(PDF) 8 Page - Intersil Corporation |
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X9258UV24IZ-2.7 Datasheet(HTML) 8 Page - Intersil Corporation |
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8 / 19 page  8 FN8168.6 December 15, 2011 All DCP potentiometers share the serial interface and share a common architecture. Each potentiometer has a Wiper Counter Register and four Data Registers. A detailed discussion of the register organization and array operation follows. Wiper Counter Register The X9258 contains four Wiper Counter Registers, one for each DCP potentiometer. The Wiper Counter Register can be envisioned as a 8-bit parallel and serial load counter with its outputs decoded to select one of 256 switches along its resistor array. The contents of the WCR can be altered in four ways: 1. Written directly by the host via the Write Wiper Counter Register instruction (serial load) 2. Written indirectly by transferring the contents of one of four associated Data Registers via the XFR Data Register instruction (parallel load) 3. Can be modified one step at a time by the Increment/Decrement instruction. 4. Loaded with the contents of its data register zero (R0) upon power-up. The WCR is a volatile register; that is, its contents are lost when the X9258 is powered-down. Although the register is automatically loaded with the value in R0 upon power-up, it should be noted this may be different from the value present at power-down. Data Registers Each potentiometer has four nonvolatile Data Registers. These can be read or written directly by the host and data can be transferred between any of the four Data Registers and the WCR. It should be noted all operations changing data in one of these registers is a nonvolatile operation and will take a maximum of 10ms. If the application does not require storage of multiple settings for the potentiometer, these registers can be used as regular memory locations that could possibly store system parameters or user preference data. Register Descriptions Data Registers, (8-bit), Nonvolatile Four 8-bit Data Registers for each DCP (sixteen 8-bit registers in total). {D7~D0}: These bits are for general purpose not volatile data storage or for storage of up to four different wiper values. The contents of Data Register 0 are automatically moved to the wiper counter register on power-up. FIGURE 8. DETAILED POTENTIOMETER BLOCK DIAGRAM DETAILED OPERATION SERIAL DATA PATH FROM INTERFACE CIRCUITRY REGISTER 0 REGISTER 1 REGISTER 2 REGISTER 3 SERIAL BUS INPUT PARALLEL BUS INPUT WIPER COUNTER REGISTER INC/DEC LOGIC UP/DN CLK MODIFIED SCL UP/DN VH/RH VL/RL VW/RW If WCR = 00[H] then VW/RW = VL/RL If WCR = FF[H] then VW/RW = VH/RH 8 8 (WCR) WP7 WP6 WP5 WP4 WP3 WP2 WP1 WP0 NV NV NV NV NV NV NV NV (MSB) (LSB) X9258 |
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