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IS64WV10248BLL-10TA3 Datasheet(PDF) 11 Page - Integrated Silicon Solution, Inc

Part # IS64WV10248BLL-10TA3
Description  1M x 8 HIGH-SPEED CMOS STATIC RAM
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Manufacturer  ISSI [Integrated Silicon Solution, Inc]
Direct Link  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS64WV10248BLL-10TA3 Datasheet(HTML) 11 Page - Integrated Silicon Solution, Inc

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Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
11
Rev. B
06/03/08
IS61WV10248ALL
IS61WV10248BLL
IS64WV10248BLL
WRITE CYCLE SWITCHING CHARACTERISTICS(1,3) (Over Operating Range)
-8
-10
Symbol
Parameter
Min.
Max.
Min.
Max.
Unit
tWC
WriteCycleTime
8
10
ns
tSCE
CEtoWriteEnd
6.5
8
ns
tAW
AddressSetupTime
6.5
8
ns
toWriteEnd
tHA
AddressHoldfromWriteEnd
0
0
ns
tSA
AddressSetupTime
0
0
ns
tPWE1
WE PulseWidth(OE = HIGH)
6.5
8
ns
tPWE2
WEPulseWidth (OE=LOW)
8.0
10
ns
tSD
DataSetuptoWriteEnd
5
6
ns
tHD
DataHoldfromWriteEnd
0
0
ns
tHZWE(2)
WELOWtoHigh-ZOutput
3.5
5
ns
tLZWE(2)
WEHIGHtoLow-ZOutput
2
2
ns
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0V to 3.0V and
output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. The internal write time is defined by the overlap of
CE LOW and WE LOW. All signals must be in valid states to initiate a Write,
but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling
edge of the signal that terminates the write. Shaded area product in development


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