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H5PS1G83JFR Datasheet(PDF) 44 Page - Hynix Semiconductor

Part # H5PS1G83JFR
Description  1Gb DDR2 SDRAM
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Manufacturer  HYNIX [Hynix Semiconductor]
Direct Link  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

H5PS1G83JFR Datasheet(HTML) 44 Page - Hynix Semiconductor

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Rev. 1.7 / Apr. 2012
44
Release
H5PS1G83JFR Series
For purposes of IDD testing, the following parameters are to be utilized
Detailed IDD7
The detailed timings are shown below for IDD7. Changes will be required if timing parameter changes are made to the
specification.
Legend: A = Active; RA = Read with Autoprecharge; D = Deselect
IDD7: Operating Current: All Bank Interleave Read operation
All banks are being interleaved at minimum tRC(IDD) without violating tRRD(IDD) using a burst length of 4. Control
and address bus inputs are STABLE during DESELECTs. IOUT = 0mA
Timing Patterns for 8 bank devices x8 (1KB Page size)
-DDR2-1066 all bins: A0 RA0 D D A1 RA1 D D A2 RA2 D D A3 RA3 D D D D D A4 RA4 D D A5 RA5 D D A6 RA6 D D A7 RA7 D D D D D
Speed Bin
(CL-tRCD-tRP)
DDR2-1066
Units
7-7-7
CL(IDD)
7
tCK
tRCD(IDD)
13.125
ns
tRC(IDD)
58.125
ns
tRRD(IDD)-x8
7.5
ns
tFAW-x8
35
ns
tCK(IDD)
1.875
ns
tRASmin(IDD)
45
ns
tRASmax(IDD)
70000
ns
tRP(IDD)
13.125
ns
tRFC(IDD)-256Mb
75
ns
tRFC(IDD)-512Mb
105
ns
tRFC(IDD)-1Gb
127.5
ns


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