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H5PS5182GFRS6C Datasheet(PDF) 30 Page - Hynix Semiconductor

Part # H5PS5182GFRS6C
Description  512Mb DDR2 SDRAM
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Manufacturer  HYNIX [Hynix Semiconductor]
Direct Link  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

H5PS5182GFRS6C Datasheet(HTML) 30 Page - Hynix Semiconductor

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Rev.1.7 / Feb. 2013
30
H5PS5162GFR series
If the actual signal is earlier than the nominal slew rate line anywhere between shaded ‘dc to VREF(dc)
region’, the slew rate of a tangent line to the actual signal from the dc level to VREF(dc) level is used for
derating value(see Fig d.)
Although for slow rates the total setup time might be negative(i.e. a valid input signal will not have
reached VIH/IL(ac) at the time of the rising clock transition) a valid input signal is still required to complete
the transition and reach VIH/IL(ac).
For slew rates in between the values listed in table, the derating values may obtained by linear interpola-
tion.
These values are typically not subject to production test. They are verified by design and characterization.


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