AD1849K

REV. A

–11–

CONTROL REGISTERS

The AD1849K SoundPort Stereo Codec accepts control information through its serial port when in Control Mode. Some control

information is also embedded in the data stream when in Data Mode. (See Figure 8.) Control bits can also be read back for system

verification. Operation of the AD1849K is determined by the state of these control bits. The 64-bit serial Control Mode and Data

Mode control registers have been arbitrarily broken down into bytes for ease of description. All control bits initialize to default states

after

RESET or Power Down. Those control bits that cannot be changed in Control Mode are initialized to defaults on the transition

from Data Mode to Control Mode. See below for a definition of these defaults.

Control Mode Control Registers

Control Byte 1, Status Register

Data 7

Data 6

Data 5

Data 4

Data 3

Data 2

Data 1

Data 0

001

MB

O L B

DCB

0

AC

63

62

61

60

59

58

57

56

MB

Mic bypass:

0

Mic inputs applied to 20 dB fixed gain block.

1

Mic inputs bypass 20 dB fixed gain block.

OLB

Output level bit:

0

Full-scale line 0 output is 2.8 V p-p (1 V rms).

Full-scale line 1 output is 4.0 V p-p.

Full-scale mono speaker output is 8.0 V p-p.

1

Full-scale line 0 output is 2.0 V p-p.

Full-scale line 1 output is 2.0 V p-p.

Full-scale mono speaker output is 4.0 V p-p.

DCB

Data/control bit. Used for handshaking in data/control transitions. See “DCB Handshake Protocol.”

AC

Autocalibration.

Autocalibration will always occur on the Control-to-Data mode transition. The AC bit is ignored. Autocalibration

requires an interval of 194 frames. Offsets for all channels of ADC and DAC are zeroed. The user should specify that

analog outputs are muted to prevent undesired outputs, i.e., OM0 = “0,” OM1 = “0,” and SM =“0.” Monitor mix will

be automatically disabled by the Codec.