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ADV212-HD-EB Datasheet(PDF) 5 Page - Analog Devices |
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ADV212-HD-EB Datasheet(HTML) 5 Page - Analog Devices |
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5 / 44 page  ADV212 Rev. B | Page 5 of 44 CLOCK AND RESET SPECIFICATIONS Table 3. Parameter Mnemonic Min Typ Max Unit MCLK Period tMCLK 13.3 100 ns MCLK Frequency fMCLK 10 75.18 MHz MCLK Width Low tMCLKL 6 ns MCLK Width High tMCLKH 6 ns VCLK Period tVCLK 13.4 50 ns VCLK Frequency fVCLK 20 74.60 MHz VCLK Width Low tVCLKL 5 ns VCLK Width High tVCLKH 5 ns RESET Width Low t RESET 5 MCLK cycles1 1 For a definition of MCLK, see Figure 32. MCLK VCLK tMCLK tMCLKH tMCLKL tVCLKH tVCLKL tVCLK Figure 2. Input Clock |
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