SER IN

DRAIN0

DRAIN1

DRAIN2

DRAIN3

GND

SRCK

DRAIN7

DRAIN6

DRAIN5

DRAIN4

RCK

SER OUT

CLR

G

D

C1

CLR

D

C1

CLR

D

C1

CLR

D

C1

CLR

D

C1

CLR

D

C1

CLR

D

C1

CLR

D

C1

CLR

D

C1

CLR

D

C1

CLR

D

C1

CLR

D

C1

CLR

D

C1

CLR

D

C1

CLR

D

D

C1

C1

CLR

CLR

D

C1

CLR

TLC6C598-Q1

SLIS142B – DECEMBER 2012 – REVISED MARCH 2013

www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

ORDERING INFORMATION

For the most-current package and ordering information, see the Package Option Addendum at the end of this

document, or see the TI Web site at www.ti.com.

Logic Diagram (Positive Logic)

Figure 2. Logic Diagram of TLC6C598-Q1

2

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