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AD8804ANZ Datasheet(PDF) 8 Page - Analog Devices |
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AD8804ANZ Datasheet(HTML) 8 Page - Analog Devices |
8 / 16 page AD8802/AD8804 REV. 0 –8– ... DAC 12 ADDR DECODE SERIAL REGISTER CS CLK SDI DAC 2 DAC 1 Figure 18. Equivalent Control Logic The target DAC register is loaded with the last eight bits of the serial data-word completing one DAC update. Twelve separate 12-bit data words must be clocked in to change all twelve out- put settings. All digital inputs are protected with a series input resistor and parallel Zener ESD structure shown in Figure 19. Applies to digital input pins CS, SDI, RS, SHDN, CLK LOGIC 1k Ω Figure 19. Equivalent ESD Protection Circuit Digital inputs can be driven by voltages exceeding the AD8802/ AD8804 VDD supply value. This allows 5 V logic to interface directly to the part when it is operated at 3 V. APPLICATIONS Supply Bypassing Precision analog products, such as the AD8802/AD8804, re- quire a well filtered power source. Since the AD8802/AD8804 operate from a single +3 V to +5 V supply, it seems convenient to simply tap into the digital logic power supply. Unfortunately, the logic supply is often a switch-mode design, which generates noise in the 20 kHz to 1 MHz range. In addition, fast logic gates can generate glitches hundred of millivolts in amplitude due to wiring resistances and inductances. If possible, the AD8802/AD8804 should be powered directly from the system power supply. This arrangement, shown in Fig- ure 20, will isolate the analog section from the logic switching transients. Even if a separate power supply trace is not available, however, generous supply bypassing will reduce supply-line in- duced errors. Local supply bypassing consisting of a 10 µF tan- talum electrolytic in parallel with a 0.1 µF ceramic capacitor is recommended (Figure 21). TTL/CMOS LOGIC CIRCUITS +5V POWER SUPPLY 10µF TANT 0.1µF + AD8802/ AD8804 Figure 20. Use Separate Traces to Reduce Power Supply Noise AD8802/ AD8804 VDD DGND 10µF 0.1µF + +5V Figure 21. Recommended Supply Bypassing for the AD8802/AD8804 Buffering the AD8802/AD8804 Output In many cases, the nominal 5 k Ω output impedance of the AD8802/AD8804 is sufficient to drive succeeding circuitry. If a lower output impedance is required, an external amplifier can be added. Several examples are shown in Figure 22. One ampli- fier of an OP291 is used as a simple buffer to reduce the output resistance of DAC A. The OP291 was chosen primarily for its rail-to-rail input and output operation, but it also offers opera- tion to less than 3 V, low offset voltage, and low supply current. The next two DACs, B and C, are configured in a summing arrangement where DAC C provides the coarse output voltage setting and DAC B can be used for fine adjustment. The inser- tion of R1 in series with DAC B attenuates its contribution to the voltage sum node at the DAC C output. VH VL VREFH VDD +5V GND VREFL DIGITAL INTERFACING OMITTED FOR CLARITY R1 100k Ω OP291 AD8802/ AD8804 SIMPLE BUFFER 0V TO 5V SUMMER CIRCUIT WITH FINE TRIM ADJUSTMENT VH VL VH VL Figure 22. Buffering the AD8802/AD8804 Output Increasing Output Voltage Swing An external amplifier can also be used to extend the output volt- age swing beyond the power supply rails of the AD8802/AD8804. This technique permits an easy digital interface for the DAC, while expanding the output swing to take advantage of higher voltage external power supplies. For example, DAC A of Fig- ure 23 is configured to swing from –5 V to +5 V. The actual output voltage is given by: VOUT = 1 + R F RS × D 256 × 5V ()–5V where D is the DAC input value (i.e., 0 to 255). This circuit can be combined with the “fine/coarse” circuit of Figure 22 if, for example, a very accurate adjustment around 0 V is desired. |
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