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EP3C105F780I7 Datasheet(PDF) 53 Page - Altera Corporation |
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EP3C105F780I7 Datasheet(HTML) 53 Page - Altera Corporation |
53 / 274 page CIII51005-2.3 © 2011 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as trademarks or service marks are the property of their respective holders as described at www.altera.com/common/legal.html. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services. Cyclone III Device Handbook Volume 1 December 2011 Subscribe ISO 9001:2008 Registered 4. Embedded Multipliers in the Cyclone III Device Family The Cyclone® III device family (Cyclone III and Cyclone III LS devices) includes a combination of on-chip resources and external interfaces that help to increase performance, reduce system cost, and lower the power consumption of digital signal processing (DSP) systems. The Cyclone III device family, either alone or as DSP device co-processors, are used to improve price-to-performance ratios of DSP systems. Particular focus is placed on optimizing Cyclone III and Cyclone III LS devices for applications that benefit from an abundance of parallel processing resources, which include video and image processing, intermediate frequency (IF) modems used in wireless communications systems, and multi-channel communications and video systems. This chapter contains the following sections: ■ “Embedded Multiplier Block Overview” on page 4–2 ■ “Architecture” on page 4–3 ■ “Operational Modes” on page 4–5 December 2011 CIII51005-2.3 |
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