10-Bit, 11Msps, Full-Duplex

Analog Front-End

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9

ELECTRICAL CHARACTERISTICS (continued)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Reference Input Voltage

1.024

V

Differential Reference Output

0.512

V

Common-Mode Output Voltage

V

Maximum REFP/REFN/COM

Source Current

2mA

Maximum REFP/REFN/COM

Sink Current

2mA

REFIN Input Current

-0.7

µA

REFIN Input Resistance

500

k

Ω

DIGITAL INPUTS (CLK, SCLK, DIN,

CS/WAKE, DA9–DA0)

Input High Threshold

V

Input Low Threshold

V

CLK, SCLK, DIN,

CS/WAKE = OGND or

-1

+1

-1

+1

Input Leakage

DA9–DA0 = OGND

-5

+5

µA

Input Capacitance

5pF

DIGITAL OUTPUTS (AD9–AD0, DOUT)

Output-Voltage Low

V

Output-Voltage High

V

Tri-State Leakage Current

-1

+1

µA

Tri-State Output Capacitance

5pF

zation.

15.6kHz. The aux-ADC conversion time does not include the time to clock the serial data out of DOUT. The maximum con-

Note 3: SNR, SINAD, SFDR, HD3, and THD are based on a differential analog input voltage of -0.5dBFS referenced to the amplitude

of the digital outputs. SINAD and THD are calculated using HD2 through HD6.

Note 4: Crosstalk rejection is measured by applying a high-frequency test tone to one channel and a low-frequency tone to the sec-

ond channel. FFTs are performed on each channel. The parameter is specified as the power ratio of the first and second

channel FFT test tones.

Note 5: Amplitude and phase matching are measured by applying the same signal to each channel, and comparing the two output

signals using a sine-wave fit.

Note 6: Guaranteed by design and characterization.