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SI3018 Datasheet(PDF) 7 Page - Silicon Laboratories |
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SI3018 Datasheet(HTML) 7 Page - Silicon Laboratories |
7 / 112 page Si3050 + Si3018/19 Rev. 1.31 7 Table 3. DC Characteristics, VD = 3.3 V (VD = 3.0 to 3.6 V, TA = 0 to 70 °C for F/K-Grade) Parameter Symbol Test Condition Min Typ Max Unit High Level Input Voltage1 VIH 2.0 — — V Low Level Input Voltage1 VIL —— 0.8 V High Level Output Voltage VOH IO =–2mA 2.4 — — V Low Level Output Voltage VOL IO = 2 mA — — 0.35 V AOUT High Level Voltage VAH IO =10mA 2.4 — — V AOUT Low Level Voltage VAL IO =10mA — — 0.35 V Input Leakage Current IL –10 — 10 µA Power Supply Current, Digital2 ID VD pin — 8.5 10 mA Total Supply Current, Sleep Mode2 ID PDN = 1, PDL = 0 — 5.0 6.0 mA Total Supply Current, Deep Sleep2,3 ID PDN = 1, PDL = 1 — 1.3 1.5 mA Notes: 1. VIH/VIL do not apply to C1A/C2A. 2. All inputs at 0.4 or VD – 0.4 (CMOS levels). All inputs are held static except clock and all outputs unloaded (Static IOUT = 0mA). 3. RGDT is not functional in this state. |
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