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EPF10K50V Datasheet(PDF) 49 Page - Altera Corporation |
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EPF10K50V Datasheet(HTML) 49 Page - Altera Corporation |
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49 / 128 page  Altera Corporation 49 FLEX 10K Embedded Programmable Logic Device Family Data Sheet Notes to tables: (1) See the Operating Requirements for Altera Devices Data Sheet. (2) Minimum DC input voltage is –0.5 V. During transitions, the inputs may undershoot to –2.0 V or overshoot to 5.75 V for input currents less than 100 mA and periods shorter than 20 ns. (3) Numbers in parentheses are for industrial-temperature-range devices. (4) Maximum VCC rise time is 100 ms. VCC must rise monotonically. (5) EPF10K50V and EPF10K130V device inputs may be driven before VCCINT and VCCIO are powered. (6) Typical values are for T A = 25° C and VCC = 3.3 V. (7) These values are specified under the EPF10K50V and EPF10K130V device Recommended Operating Conditions in Table 23 on page 48. (8) The IOH parameter refers to high-level TTL or CMOS output current. (9) The IOL parameter refers to low-level TTL or CMOS output current. This parameter applies to open-drain pins as well as output pins. (10) This value is specified for normal device operation. The value may vary during power-up. (11) This parameter applies to -1 speed grade EPF10K50V devices, -2 speed grade EPF10K50V industrial temperature devices, and -2 speed grade EPF10K130V devices. (12) Capacitance is sample-tested only. Table 24. EPF10K50V & EPF10K130V Device DC Operating Conditions Notes (6), (7) Symbol Parameter Conditions Min Typ Max Unit VIH High-level input voltage 2.0 5.75 V VIL Low-level input voltage –0.5 0.8 V VOH 3.3-V high-level TTL output voltage I OH = –8 mA DC (8) 2.4 V 3.3-V high-level CMOS output voltage I OH = –0.1 mA DC (8) VCCIO – 0.2 V VOL 3.3-V low-level TTL output voltage I OL = 8 mA DC (9) 0.45 V 3.3-V low-level CMOS output voltage I OL = 0.1 mA DC (9) 0.2 V II Input pin leakage current VI = 5.3 V to –0.3 V (10) –10 10 µA IOZ Tri-stated I/O pin leakage current VO = 5.3 V to –0.3 V (10) –10 10 µA ICC0 VCC supply current (standby) VI = ground, no load 0.3 10 mA VI = ground, no load (11) 10 mA Table 25. EPF10K50V & EPF10K130V Device Capacitance (12) Symbol Parameter Conditions Min Max Unit CIN Input capacitance VIN = 0 V, f = 1.0 MHz 10 pF CINCLK Input capacitance on dedicated clock pin VIN = 0 V, f = 1.0 MHz 15 pF COUT Output capacitance VOUT = 0 V, f = 1.0 MHz 10 pF |
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