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EP1SGX40FF1020I6N Datasheet(PDF) 28 Page - Altera Corporation |
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EP1SGX40FF1020I6N Datasheet(HTML) 28 Page - Altera Corporation |
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28 / 272 page  2–18 Altera Corporation Stratix GX Device Handbook, Volume 1 June 2006 Deserializer (Serial-to-Parallel Converter) The deserializer converts the serial stream into a parallel 8- or 10-bit data bus. The deserializer receives the least significant bit first. Figure 2–14 is a diagram of the deserializer. Figure 2–14. Deserializer Word Aligner The word aligner aligns the incoming data based on the specific byte boundaries. The word aligner has three customizable modes of operation: bit-slip mode, 16-bit mode, and 10-bit mode, the last of which is available for the basic and SONET modes. The word aligner also has two non-customizable modes of operation, which are the XAUI and GIGE modes. Figure 2–15 shows the word aligner in bit-slip mode. High-speed serial clock D7 D6 D5 D4 D3 D2 D1 D0 D8 D9 Low-speed parallel clock D7 D6 D5 D4 D3 D2 D1 D0 D8 D9 10 |
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