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TK5551 Datasheet(PDF) 9 Page - ATMEL Corporation |
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TK5551 Datasheet(HTML) 9 Page - ATMEL Corporation |
9 / 294 page 9 9219A–RFID–01/11 Atmel ATA5505 [Preliminary] 1.4.1 Port A (PA7..PA0) Port A is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port A output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port A pins that are externally pulled low will source current if the pull-up resistors are activated. The Port A pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port A also serves the functions of various special fea- tures of the microcontroller. 1.4.2 Port B (PB7..PB0) Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port B pins that are pulled low externally will source current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port B also serves the functions of various special fea- tures of the microcontroller. 1.4.3 RESET Device reset 1.4.4 XTAL1 and XTAL2 XTAL1 and XTAL2 are input and output, respectively, of an inverting amplifier which can be configured for use as an On-chip oscillator. Either a quartz crystal or a ceramic resonator may be used. 1.5 Atmel AVR Description The microcontroller is a low-power CMOS 8-bit microcontroller based on the Atmel ® AVR® enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the microcontroller achieves throughputs approaching 1MIPS per MHz, allowing the system designer to optimize power consumption versus processing speed. The Atmel AVR core combines a rich instruction set with 32 general purpose working regis- ters. All 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in a single instruction executed in one clock cycle. The resulting architecture is more code-efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers. The microcontroller provides the following features: 16K byte of in-system programmable Flash, 512bytes EEPROM, 512bytes SRAM, 16 general purpose I/O lines, 32 general purpose working registers, one 8-bit timer/counter with compare modes, one 8-bit high speed timer/counter, a universal serial interface, a LIN controller, internal and external interrupts, an 11-channel, 10-bit ADC, a programmable watchdog timer with internal oscillator, and three software selectable power saving modes. The Idle mode stops the CPU while allowing the SRAM, timer/counter, ADC, analog comparator, and interrupt system to continue functioning. Power-down mode saves the register contents, disabling all chip functions until the next inter- rupt or hardware reset. To minimize switching noise during ADC conversions, ADC noise reduction mode stops the CPU and all I/O modules except ADC. |
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