Reference

Generator

LVDS

INN0

INP0

INN1

INP1

IN_SEL

GND

OUTN [0..3]

OUTP [0..3]

200 kW

200 kW

3mmx 3mm

16 pinQFN (RGT)

ThermalPad

INP0

INN0

1

2

3

4

5

6

7

8

12

11

10

9

16

15

14

13

OUTP2

OUTN3

OUTP3

OUTN2

CDCLVD1204

SCAS898A – MAY 2010 – REVISED JUNE 2010

www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Figure 2. CDCLVD1204 Block Diagram

RGT PACKAGE

(TOP VIEW)

2

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Product Folder Link(s): CDCLVD1204