STAT

SCL

SDA

PGND

PGND

SYS

SYS

4

5

6

7

8

9

15

16

17

18

22

23

24

1

2

3

BAT

BAT

13

14

19

20

21

10

11

12

VBUS

D+

D

–

bq24190

STAT

SCL

SDA

PGND

PGND

SYS

SYS

4

5

6

7

8

9

15

16

17

18

22

23

24

1

2

3

BAT

BAT

13

14

19

20

21

10

11

12

VBUS

PSEL

PG

bq24192

bq24192I

bq24193

bq24190, bq24192

bq24192I, bq24193

www.ti.com

SLUSAW5A – JANUARY 2012 – REVISED OCTOBER 2012

PINOUTS

PIN FUNCTIONS

PIN

TYPE

DESCRIPTION

NAME

NO.

VBUS

1,24

P

Charger Input Voltage. The internal n-channel reverse block MOSFET (RBFET) is connected between VBUS and PMID

with VBUS on source. Place a 1µF ceramic capacitor from VBUS to PGND and place it as close as possible to IC. (Refer

to Application Information Section for details)

D+

2

I

Positive line of the USB data line pair. D+/D– based USB host/charging port detection. The detection includes data

contact detection (DCD) and primary detection in bc1.2.

(bq24190)

Analog

PSEL

–

I

Power source selection input. High indicates a USB host source and Low indicates an adapter source.

(bq24192

Digital

bq24192I

bq24193)

D–

3

I

Negative line of the USB data line pair. D+/D– based USB host/charging port detection. The detection includes data

contact detection (DCD) and primary detection in bc1.2.

(bq24190)

Analog

PG

–

O

Open drain active low power good indicator. Connect to the pull up rail via 10kohm resistor. LOW indicates a good input

source if the input voltage is between UVLO and ACOV, above SLEEP mode threshold, and current limit is above 30mA.

(bq24192

Digital

bq24192I

bq24193)

STAT

4

O

Open drain charge status output to indicate various charger operation. Connect to the pull up rail via 10kohm. LOW

indicates charge in progress. HIGH indicates charge complete or charge disabled. When any fault condition occurs, STAT

Digital

pin in bq24190, bq24192, bq24193 blinks at 1Hz, and STAT pin in bq24192I has a 10k

Ω resistor to ground.

SCL

5

I

Ω resistor.

Digital

SDA

6

I/O

Ω resistor.

Digital

INT

7

O

Open-drain Interrupt Output. Connect the INT to a logic rail via 10k

Ω resistor. The INT pin sends active low, 256us pulse

to host to report charger device status and fault.

Digital

OTG

8

I

USB current limit selection pin during buck mode, and active high enable pin during boost mode.

Digital

In buck mode with USB host (PSEL=High), when OTG = High, IIN limit = 500mA and when OTG = Low, IIN limit =

100mA.

The boost mode is activated when the REG01[5:4]=10 and OTG pin is High.

CE

9

I

Active low Charge Enable pin. Battery charging is enabled when REG01[5:4]=01 and CE pin = Low. CE pin must be

pulled high or low.

Digital

ILIM

10

I

ILIM pin sets the maximum input current limit by regulating the ILIM voltage at 1V. A resistor is connected from ILIM pin to

Analog

Copyright © 2012, Texas Instruments Incorporated

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Product Folder Links: bq24190 bq24192 bq24192I bq24193