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BQ76925PWR Datasheet(PDF) 8 Page - Texas Instruments |
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BQ76925PWR Datasheet(HTML) 8 Page - Texas Instruments |
8 / 35 page bq76925 SLUSAM9B – JULY 2011 – REVISED DECEMBER 2011 www.ti.com Current Sense Amplifier PARAMETER TEST CONDITION MIN TYP MAX UNIT I_GAIN = 0 4 Measured from SENSEN, GVIOUT Current sense amplifier gain SENSEP to VIOUT I_GAIN = 1 8 Measured from SENSEN, VIIN Current sense amp input range –125 375 mV SENSEP to VSS REF_SEL = 0 0.25 1.25 V Current sense amp output range Measured at VIOUT REF_SEL = 1 0.5 2.5 V VIOUT REF_SEL = 0 1.0 V Measured at VIOUT Zero current output SENSEP = SENSEN REF_SEL = 1 2.0 V ∆VIOUT Current amplifier accuracy –1% 1% IVIOUT VIOUT output current (1) 10 µA (1) Max DC load for specified accuracy Over Current Comparator PARAMETER TEST CONDITION MIN TYP MAX UNIT VBAT_COMP Minimum VBAT for comparator operation(1) 5 V Measured from SENSEP to comparator GVCOMP Comparator amplifier gain 1 input VITRIP Current comparator trip threshold(2) 25 400 mV VITRIP = 25 mV –6 6 mV ∆VITRIP Current comparator accuracy VITRIP > 25 mV –10% 10% V VOL_ALERT ALERT Output Low Logic IALERT = 1 mA 0.4 V VOH_ALERT ALERT Output High Logic (3) NA NA NA IALERT ALERT Pulldown current ALERT = 0.4 V, Output driving low 1 mA IALERT_LKG ALERT Leakage current ALERT = 5.0 V, Output high-Z < 1 μA tOC Comparator response time 100 µs (1) The Over Current Comparator is not guaranteed to work when VBAT is below this voltage. (2) Trip threshold selectable from 25, 50, 75, 100, 125, 150, 175, 200, 225, 250, 275, 300, 325, 350, 375 or 400 mV (3) This parameter NA because output is open drain. Internal Temperature Measurement PARAMETER TEST CONDITION MIN TYP MAX UNIT VTEMP_INT Internal temperature voltage Measured at VCOUT, TINT = 25°C 1.15 1.2 1.25 V ∆VTEMP_INT Internal temperature voltage sensitivity –4.4 mV / ºC Cell Balancing and Open Cell Detection PARAMETER TEST CONDITION MIN TYP MAX UNIT RDS,ON for VC1 internal FET switch, 1 3 5 VCn = 3.6 V RBAL Cell balancing internal resistance(1) Ω RDS,ON for internal VC2 to VC6 FET switch, 3 5.5 8 VCn = 3.6 V (1) Balancing current is not internally limited. The cell balancing operation is completely controlled by the Host processor, no automatic function or time-out is included in the part. Care must be used to ensure that balancing current through the part is below the maximum power dissipation limit. The Host algorithm is responsible for limiting thermal dissipation to package ratings. 8 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): bq76925 |
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