UCC24610

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SLUSA87B – AUGUST 2010 – REVISED SEPTEMBER 2010

MODES OF OPERATION

UVLO Mode

disabled and ICC current is typically much less than 100 µA. While in this mode, the EN current source is shut

off, an internal 10-k

Ω resistance is applied from the EN/TOFF pin to GND, the voltage on EN/TOFF is irrelevant,

and the GATE output is driven low continuously for all VCC > 1.2 V. The device passes out of UVLO Mode when

Sleep Mode

Sleep Mode is a low-power operating mode similar to UVLO Mode, except that this mode is entered under

conditions, and immediately forces the GATE output low and enters Sleep Mode. Many internal circuits are

Sleep Mode synchronously into Light-Load Mode after a delay of approximately 25 µs to allow re-powered

internal circuits to settle.

Run Mode

Run Mode is the normal operating mode of the controller when not in UVLO Mode, Sleep Mode, or Light-Load

Mode. In this mode, VCC current is higher because all internal control and timing functions are operating and the

plus the average current necessary to drive the load on the GATE output. GATE output duty-cycle is dependent

upon system line and load conditions, programmed TON and TOFF times, and SYNC-pulse timing (if applicable).

Light-Load Mode

Light-Load Mode is a low-power operating mode similar to Sleep Mode, except that this mode is entered

automatically based on internal timing conditions. Light-Load Mode automatically reduces switching losses under

light-load conditions by suppressing GATE output pulses whenever the detected synchronous conduction time is

Mode, the MOSFET body-diode conduction time is still continuously monitored. When this time is detected to

once again exceed TON, the device resumes Run Mode on the next switching cycle.

Fault Mode and Other Protections

Fault Mode is a self-protection operating mode of the controller when certain types of single-fault conditions are

detected on certain pins. In this mode, the device enters a shut-down state (not Sleep Mode) and drives the

the conditions of excessive or indefinite on-time (such as from an open-pin) and of excessive TON current (such

as from a shorted-pin).

Similar protection is provided for the EN/TOFF pin. While not specifically detected as faults, if this pin becomes

open-circuited TOFF defaults to a minimum value of ~0.65 µs, and if shorted-to-GND the device enters Sleep

Mode. Additionally, if the SYNC input is continuously held below its trigger threshold voltage, the GATE output is

held low for the entire duration that SYNC remains in that condition.

Copyright © 2010, Texas Instruments Incorporated

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