TB6674PG/FG/FAG

Ver.3

2010-07-07

8

Over Current Protection (ISD) Circuit

The IC incorporates the over current protection circuit that monitors the current flowing through each

output power transistor. If a current, which is out of the detecting current, is sensed at any one of these

transistors, all output transistors are turned off (Hi-Z). (However, ISD is not incorporated in upper

PchDMOS when PS is high level (Vs2A is 5 V usage) because ON resistance is large.

Masking time is 20 μs. The operation does not recover automatically (latch method). There are two

recovery methods written below.

(1) Power monitor turns on when any of the power supply decreases and reaches the specified voltage.

(2) Vs2B is set low level for 20 μs or more and then set high. The operation recovers in 10 μs.

Reference design target of detecting current is as follows;

PS = L, VS1A (12 V) :PchDMOS = 1.1 A

PS = H/PS = L in common :Lower NchDMOS = 1.4 A

Please reduce the external noise to prevent malfunction for ISD.

ISD internal signal

H

L

Normal operation

ISD detecting value

0

20 μs

(Design target)

Output current

OFF time

UVLO (Power monitor)

Power monitoring: OFF

Power monitoring: ON

Output terminal

Vs2B

20 μs

10 μs

(Design target)

(Design target)

Operation recovers by

one of two cases.

Power monitoring: ON