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AD9773BSVZ Datasheet(PDF) 7 Page - Analog Devices |
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AD9773BSVZ Datasheet(HTML) 7 Page - Analog Devices |
7 / 60 page AD9773 Rev. D | Page 7 of 60 DIGITAL SPECIFICATIONS TMIN to TMAX, AVDD = 3.3 V, CLKVDD = 3.3 V, PLLVDD = 0 V, DVDD = 3.3 V, IOUTFS = 20 mA, unless otherwise noted. Table 3. Parameter Min Typ Max Unit DIGITAL INPUTS Logic 1 Voltage 2.1 3 V Logic 0 Voltage 0 0.9 V Logic 1 Current −10 +10 μA Logic 0 Current −10 +10 μA Input Capacitance 5 pF CLOCK INPUTS Input Voltage Range 0 3 V Common-Mode Voltage 0.75 1.5 2.25 V Differential Voltage 0.5 1.5 V SERIAL CONTROL BUS Maximum SCLK Frequency (fSLCK) 15 MHz Minimum Clock Pulse Width High (tPWH) 30 ns Minimum Clock Pulse Width Low (tPWL) 30 ns Maximum Clock Rise/Fall Time 1 ms Minimum Data/Chip Select Setup Time (tDS) 25 ns Minimum Data Hold Time (tDH) 0 ns Maximum Data Valid Time (tDV) 30 ns RESET Pulse Width 1.5 ns Inputs (SDI, SDIO, SCLK, CSB) Logic 1 Voltage 2.1 3 V Logic 0 Voltage 0 0.9 V Logic 1 Current −10 +10 μA Logic 0 Current −10 +10 μA Input Capacitance 5 pF SDIO Output Logic 1 Voltage DRVDD − 0.6 V Logic 0 Voltage 0.4 V Logic 1 Current 30 50 mA Logic 0 Current 30 50 mA |
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