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ADC12D500RFIUT Datasheet(PDF) 7 Page - Texas Instruments |
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ADC12D500RFIUT Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 84 page  ADC12D500RF, ADC12D800RF www.ti.com SNAS502E – JULY 2011 – REVISED MARCH 2013 ADC12D800/500RF 12-Bit, 1.6/1.0 GSPS RF Sampling ADC Check for Samples: ADC12D500RF, ADC12D800RF 1 Introduction 1.1 Features 12 • Excellent Noise and Linearity up to and Above • Key Specifications fIN = 2.7 GHz – Resolution 12 Bits • Configurable to Either 1.6/1.0 GSPS Interleaved – Interleaved 1.6/1.0 GSPS ADC or 800/500 MSPS Dual ADC • IMD3 (Fin = 2.7GHz @ -13dBFS): -63/-61 • New DESCLKIQ Mode for High Bandwidth, High dBc (typ) Sampling Rate Apps • IMD3 (Fin = 2.7GHz @ -16dBFS): -71/-69 • Pin-Compatible with ADC1xD1x00 dBc (typ) • AutoSync Feature for Multi-Chip • Noise Floor: -152.2/-150.5 dBm/Hz (typ) Synchronization • Noise Power Ratio: 50.4/50.7 dB (typ) • Internally Terminated, Buffered, Differential • Power: 2.50/2.02 W (typ) Analog Inputs – Dual 800/500 MSPS ADC, Fin = 498 MHz • Interleaved Timing Automatic and Manual Skew • ENOB: 9.5/9.6 Bits (typ) Adjust • SNR: 59.7/59.7 dB (typ) • Test Patterns at Output for System Debug • SFDR: 71.2/72 dBc (typ) • Time Stamp Feature to Capture External • Power per Channel: 1.25/1.01 W (typ) Trigger • Programmable Gain, Offset, and tAD Adjust Feature • 1:1 Non-Demuxed or 1:2 Demuxed LVDS Outputs 1.2 Applications • 3G/4G Wireless Basestation • SIGINT – Receive Path • RADAR / LIDAR – DPD Path • Wideband Communications • Wideband Microwave Backhaul • Consumer RF • RF Sampling Software Defined Radio • Test and Measurement • Military Communications 1.3 Description The 12-bit 1.6/1.0 GSPS ADC12D800/500RF is an RF-sampling GSPS ADC that can directly sample input frequencies up to and above 2.7 GHz. The ADC12D800/500RF augments the very large Nyquist zone of TI’s GSPS ADCs with excellent noise and linearity performance at RF frequencies, extending its usable range beyond the 7th Nyquist zone The ADC12D800/500RF provides a flexible LVDS interface which has multiple SPI programmable options to facilitate board design and FPGA/ASIC data capture. The LVDS outputs are compatible with IEEE 1596.3-1996 and supports programmable common mode voltage. The product is packaged in a lead-free 292-ball thermally enhanced BGA package over the rated industrial temperature range of -40°C to +85°C. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to Copyright © 2011–2013, Texas Instruments Incorporated specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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