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BQ24172RGYT Datasheet(PDF) 3 Page - Texas Instruments |
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BQ24172RGYT Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 40 page  ISET CHG SR V I = 20 R ´ ACSET DPM AC V I = 20 R ´ bq24170 bq24172 www.ti.com SLUSAD2B – NOVEMBER 2010 – REVISED APRIL 2011 PIN FUNCTIONS (continued) PIN TYPE DESCRIPTION NO. NAME 11 TTC I Safety Timer and termination control. Connect a capacitor from this node to AGND to set the fast charge safety timer(5.6min/nF). Pre-charge timer is internally fixed to 30 minutes. Pull the TTC to LOW to disable the charge termination and safety timer. Pull the TTC to HIGH to disable the safety timer but allow the charge termination. 12 VREF P 3.3V reference voltage output. Place a 1- μF ceramic capacitor from VREF to AGND pin close to the IC. This voltage could be used for programming ISET and ACSET and TS pins. It may also serve as the pull-up rail of STAT pin and CELL pin. 13 ISET I Fast charge current set point. Use a voltage divider from VREF to ISET to AGND to set the fast charge current: The pre-charge and termination current is internally as one tenth of the charge current. The charger is disabled when ISET pin voltage is below 40mV and enabled when ISET pin voltage is above 120mV. 14 CELL I Cell selection pin. Set CELL pin LOW for 1-cell, Float for 2-cell (0.8V-1.8V), and HIGH for 3-cell with a (bq24170) fixed 4.2V per cell. FB Charge voltage analog feedback adjustment. Connect the output of a resistor divider powered from the (bq24172) battery terminals to VFB to AGND. Output voltage is regulated to 2.1V on FB pin during constant-voltage mode. 15 SRN I Charge current sense resistor negative input. A 0.1- μF ceramic capacitor is placed from SRN to SRP to provide differential-mode filtering. A 0.1- μF ceramic capacitor is placed from SRN pin to AGND for common-mode filtering. 16 SRP I/P Charge current sense resistor, positive input. A 0.1- μF ceramic capacitor is placed from SRN to SRP to provide differential-mode filtering. A 0.1- μF ceramic capacitor is placed from SRP pin to AGND for common-mode filtering. 17 ACSET I Input current set point. Use a voltage divider from VREF to ACSET to AGND to set this value: 18 OVPSET I Valid input voltage set point. Use a voltage divider from input to OVPSET to AGND to set this voltage. The voltage above internal 1.6V reference indicates input over-voltage, and the voltage below internal 0.5V reference indicates input under-voltage. In either condition, charge terminates, and input NMOS pair ACFET/RBFET turn off. LED driven by STAT pin keeps blinking, reporting fault condition. 19 BATDRV O Battery discharge MOSFET gate driver output. Connect to 1kohm resistor to the gate of the BATFET P-channel power MOSFET. Connect the source of the BATFET to the system load voltage node. Connect the drain of the BATFET to the battery pack positive node. The internal gate drive is asymmetrical to allow a quick turn-off and slower turn-on, in addition to the internal break-before-make logic with respect to ACDRV. 20 REGN P PWM low side driver positive 6V supply output. Connect a 1- μF ceramic capacitor from REGN to PGND pin, close to the IC. Generate high-side driver bootstrap voltage by integrated diode from REGN to BTST. 21 BTST P PWM high side driver positive supply. Connect the 0.047- µF bootstrap capacitor from SW to BTST. 22,23 PGND P Power ground. Ground connection for high-current power converter node. On PCB layout, connect directly to ground connection of input and output capacitors of the charger. Only connect to AGND through the Thermal Pad underneath the IC. Thermal AGND P Exposed pad beneath the IC. Always solder Thermal Pad to the board, and have vias on the Thermal Pad Pad plane star-connecting to AGND and ground plane for high-current power converter. It dissipates the heat from the IC. Copyright © 2010–2011, Texas Instruments Incorporated 3 |
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