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AM3354BZCZD80 Datasheet(PDF) 2 Page - Texas Instruments |
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AM3354BZCZD80 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 236 page AM3359, AM3358, AM3357 AM3356, AM3354, AM3352 SPRS717F – OCTOBER 2011 – REVISED APRIL 2013 www.ti.com Locate Addresses of Data Errors from Week) and Time (Hours-Minutes-Seconds) Syndrome Polynomials Generated Using Information a BCH Algorithm – Internal 32.768-kHz Oscillator, RTC Logic • Supports 4-Bit, 8-Bit, and 16-Bit per 512- and 1.1-V Internal LDO byte Block Error Location Based on BCH – Independent Power-on-Reset Algorithms (RTC_PWRONRSTn) Input • Programmable Real-Time Unit and Industrial – Dedicated Input Pin (EXT_WAKEUP) for Communication Subsystem (PRU-ICSS) External Wake Events – Supports protocols such as EtherCAT®, – Programmable Alarm Can be Used to PROFIBUS, PROFINET, EtherNet/IP™, and Generate Internal Interrupts to the PRCM (for more Wake Up) or Cortex-A8 (for Event – Peripherals Inside the PRU-ICSS Notification) • One UART Port with Flow Control Pins, – Programmable Alarm Can be Used with Supports Up to 12 Mbps External Output (PMIC_POWER_EN) to Enable the Power Management IC to Restore • Two MII Ethernet Ports that Support Non-RTC Power Domains Industrial Ethernet, such as EtherCAT • Peripherals • One MDIO Port – Up to Two USB 2.0 High-Speed OTG Ports • One Enhanced Capture (eCAP) Module with Integrated PHY • Power Reset and Clock Management (PRCM) – Up to Two Industrial Gigabit Ethernet MACs Module (10, 100, 1000 Mbps) – Controls the entry and Exit of Stand-By and • Integrated Switch Deep-Sleep Modes • Each MAC Supports MII, RMII, RGMII and – Responsible for Sleep Sequencing, Power MDIO Interfaces Domain Switch-Off Sequencing, Wake-Up Sequencing and Power Domain Switch-On • Ethernet MACs and Switch Can Operate Sequencing Independent of Other Functions – Clocks • IEEE 1588v2 Precision Time Protocol (PTP) • Integrated 15-35 MHz High-Frequency Oscillator Used to Generate a Reference – Up to Two Controller-Area Network (CAN) Clock for Various System and Peripheral Ports Clocks • Supports CAN Version 2 Parts A and B • Supports Individual Clock Enable and – Up to Two Multichannel Audio Serial Ports Disable Control for Subsystems and (McASP) Peripherals to Facilitate Reduced Power • Transmit and Receive Clocks Up to 50 Consumption MHz • Five ADPLLs to Generate System Clocks • Up to Four Serial Data Pins per McASP (MPU Subsystem, DDR Interface, USB Port with Independent TX and RX Clocks and Peripherals [MMC and SD, UART, • Supports Time Division Multiplexing SPI, I2C], L3, L4, Ethernet, GFX [SGX530], (TDM), Inter-IC Sound (I2S), and similar LCD Pixel Clock) Formats – Power • Supports Digital Audio Interface • Two Non-Switchable Power Domains Transmission (SPDIF, IEC60958-1, and (Real-Time Clock [RTC], Wake-Up Logic AES-3 Formats) [WAKE-UP]) • FIFO Buffers for Transmit and Receive • Three Switchable Power Domains (MPU (256 bytes) Subsystem [MPU], SGX530 [GFX], – Up to Six UARTs Peripherals and Infrastructure [PER]) • All UARTs Support IrDA and CIR Modes • Implements SmartReflex™ Class 2B for • All UARTs Support RTS and CTS Flow Core Voltage Scaling Based On Die Control Temperature, Process Variation and • UART1 Supports Full Modem control Performance (Adaptive Voltage Scaling – Up to Two Master and Slave McSPI Serial [AVS]) Interfaces • Dynamic Voltage Frequency Scaling • Up to Two Chip Selects (DVFS) • Up to 48 MHz • Real-Time Clock (RTC) – Up to Three MMC, SD, and SDIO Ports – Real-Time Date (Day-Month-Year-Day of 2 Device Summary Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: AM3359 AM3358 AM3357 AM3356 AM3354 AM3352 |
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