MC34151, MC33151

http://onsemi.com

6

Figure 14. Drive Output Rise and Fall Time

versus Load Capacitance

Figure 15. Supply Current versus Drive Output

Load Capacitance

Figure 16. Supply Current versus Input Frequency

Figure 17. Supply Current versus Supply Voltage

Both Logic Inputs Driven

0 V to 5.0 V

50% Duty Cycle

Both Drive Outputs Loaded

f = 500 kHz

f = 200 kHz

f = 50 kHz

1

2

3

4

Both Logic Inputs Driven

0 V to 5.0 V,

50% Duty Cycle

Both Drive Outputs Loaded

f, INPUT FREQUENCY (Hz)

Low State Drive Outputs

Logic Inputs Grounded

High State Drive Outputs

80

60

40

20

0

80

60

40

20

0

80

60

40

20

0

8.0

6.0

4.0

2.0

0

0.1

1.0

10

0.1

1.0

10

100

1.0 M

0

4.0

8.0

12

16

10 k

APPLICATIONS INFORMATION

Description

The MC34151 is a dual inverting high speed driver

specifically designed to interface low current digital

circuitry with power MOSFETs. This device is constructed

with Schottky clamped Bipolar Analog technology which

offers a high degree of performance and ruggedness in

hostile industrial environments.

Input Stage

The Logic Inputs have 170 mV of hysteresis with the input

threshold centered at 1.67 V. The input thresholds are

with CMOS and LSTTL logic families over its entire

operating voltage range. Input hysteresis provides fast

output switching that is independent of the input signal

transition time, preventing output oscillations as the input

thresholds are crossed. The inputs are designed to accept a

the output of one channel to directly drive the input of a

second channel for master−slave operation. Each input has

a 30 k

W pulldown resistor so that an unconnected open input

will cause the associated Drive Output to be in a known high

state.

Output Stage

Each totem pole Drive Output is capable of sourcing and

sinking up to 1.5 A with a typical ‘on’ resistance of 2.4

W at

1.0 A. The low ‘on’ resistance allows high output currents

drivers. Each output has a 100 k

W pulldown resistor to keep

current or thermal protection has been designed into the

avoided.

Parasitic inductance in series with the load will cause the

transition, and below ground during the turn−off transition.

With CMOS drivers, this mode of operation can cause a

destructive output latchup condition. The MC34151 is

immune to output latchup. The Drive Outputs contain an

supply bypassing must be observed to prevent the output

ringing from exceeding the maximum 20 V device rating.

Negative output transients are clamped by the internal NPN

pullup transistor. Since full supply voltage is applied across