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IA80C152JD Datasheet(PDF) 6 Page - InnovASIC, Inc |
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IA80C152JD Datasheet(HTML) 6 Page - InnovASIC, Inc |
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6 / 61 page  IA80C152 Data Sheet Universal Communications Controller July 29, 2010 IA211040524-06 http://www.Innovasic.com UNCONTROLLED WHEN PRINTED OR COPIED Customer Support: Page 6 of 61 1-888-824-4184 ® LIST OF TABLES Table 1. IC Version Differences .....................................................................................................7 Table 2. JA/JC Versions Numeric Pin Listing..............................................................................11 Table 3. JA/JC Versions Alphabetic Pin Listing ..........................................................................12 Table 4. JB/JD Versions Numeric Pin Listing..............................................................................14 Table 5. JB/JD Versions Alphabetic Pin Listing ..........................................................................15 Table 6. I/O Signal Descriptions...................................................................................................17 Table 7. Absolute Maximum Ratings ...........................................................................................20 Table 8. Thermal Characteristics ..................................................................................................20 Table 9. DC Parameters ................................................................................................................21 Table 10. Summary of Program Memory Fetches........................................................................25 Table 11. List of Registers ............................................................................................................25 Table 12. List of Interrupts ...........................................................................................................27 Table 13. DCON0,1 Register........................................................................................................29 Table 14. GMOD Register ............................................................................................................30 Table 15. IE* Register ..................................................................................................................31 Table 16. IEN1* Register .............................................................................................................32 Table 17. IP* Register...................................................................................................................33 Table 18. IPN1* Register..............................................................................................................33 Table 19. MYSLOT Register........................................................................................................34 Table 20. P0*, P1*, P2*, P3*, P4*, P5, P6 Register.....................................................................35 Table 21. PCON Register .............................................................................................................35 Table 22. PSW* Register..............................................................................................................36 Table 23. RSTAT* Register .........................................................................................................37 Table 24. SCON* Register ...........................................................................................................38 Table 25. TCON* Register ...........................................................................................................40 Table 26. TMOD Register ............................................................................................................41 Table 27. TMOD Register ............................................................................................................41 Table 28. Power Conservation Modes ..........................................................................................43 Table 29. External Clock Drive ....................................................................................................46 Table 30. Local Serial Channel Timing—Shift Register Mode ...................................................46 Table 31. Global Serial Port Timing—Internal Baud Rate Generator..........................................47 Table 32. Global Serial Port Timing—External Clock.................................................................49 Table 33. Instruction Set Summary ..............................................................................................50 Table 34. External Program and Data Memory Characteristics ...................................................56 Table 35. Innovasic/Intel Part Number Cross-Reference .............................................................57 Table 36. Summary of Errata........................................................................................................58 Table 37. Revision History ...........................................................................................................60 |
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