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ADA4817-1ACPZ-RL Datasheet(PDF) 6 Page - Analog Devices |
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ADA4817-1ACPZ-RL Datasheet(HTML) 6 Page - Analog Devices |
6 / 28 page ADA4817-1/ADA4817-2 Data Sheet Rev. B | Page 6 of 28 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS NC = NO CONNECT 1 PD 2 FB 3 –IN 4 +IN 7 OUT 8 +VS 6 NC 5 –VS ADA4817-1 TOP VIEW (Not to Scale) NOTES 1. EXPOSED PAD CAN BE CONNECTED TO GROUND PLANE OR NEGATIVE SUPPLY PLANE. Figure 5. ADA4817-1 Pin Configuration (8-Lead LFCSP) Table 5. ADA4817-1 Pin Function Descriptions (8-Lead LFCSP) Pin No. Mnemonic Description 1 PD Power-Down. Do not leave floating. 2 FB Feedback Pin. 3 −IN Inverting Input. 4 +IN Noninverting Input. 5 −VS Negative Supply. 6 NC No Connect. 7 OUT Output. 8 +VS Positive Supply. Exposed pad (EPAD) Exposed Pad. Can be connected to GND, −VS plane, or left floating. FB 1 –IN 2 +IN 3 –VS 4 PD 8 +VS 7 OUT 6 NC 5 NC = NO CONNECT ADA4817-1 TOP VIEW (Not to Scale) NOTES 1. EXPOSED PAD CAN BE CONNECTED TO GROUND PLANE OR NEGATIVE SUPPLY PLANE. Figure 6. ADA4817-1 Pin Configuration (8-Lead SOIC) Table 6. ADA4817-1 Pin Function Descriptions (8-Lead SOIC) Pin No. Mnemonic Description 1 FB Feedback Pin. 2 −IN Inverting Input. 3 +IN Noninverting Input. 4 −VS Negative Supply. 5 NC No Connect. 6 OUT Output. 7 +VS Positive Supply. 8 PD Power-Down. Do not leave floating. Exposed pad (EPAD) Exposed Pad. Can be connected to GND, −VS plane, or left floating. |
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