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AD7564ARZ-BREEL Datasheet(PDF) 2 Page - Analog Devices |
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AD7564ARZ-BREEL Datasheet(HTML) 2 Page - Analog Devices |
2 / 17 page Parameter B Grade 1 Units Test Conditions/Comments ACCURACY Resolution 12 Bits 1 LSB = VREF/2 12 = 2.44 mV when V REF = 10 V Relative Accuracy ±0.5 LSB max Differential Nonlinearity ±0.5 LSB max All Grades Guaranteed Monotonic Over Temperature Gain Error +25 °C ±4 LSBs max TMIN to TMAX ±5 LSBs max Gain Temperature Coefficient 2 2 ppm FSR/ °C typ 5 ppm FSR/ °C max Output Leakage Current IOUT1 @ +25 °C 10 nA max TMIN to TMAX 50 nA max REFERENCE INPUT Input Resistance 6 k Ω min Typical Input Resistance = 9.5 k Ω 13 k Ω max Ladder Resistance Mismatch 2 % max Typically 0.6% DIGITAL INPUTS VINH, Input High Voltage 2.4 V min VINL, Input Low Voltage 0.8 V max IINH, Input Current ±1 µA max CIN, Input Capacitance 2 10 pF max DIGITAL OUTPUT (SDOUT) Output Low Voltage (VOL) 0.4 V max Load Circuit as in Figure 2. Output High Voltage (VOH) 4.0 V min POWER REQUIREMENTS VDD Range 4.75/5.25 V min/V max Part Functions from 3.3 V to 5.25 V Power Supply Rejection 2 ∆Gain/∆V DD –75 dB typ IDD 10 µA max VINH = VDD, VINL = 0 V At Input Levels of 0.8 V and 2.4 V, IDD is Typically 2 mA. NOTES 1Temperature range is as follows: B Version: –40 °C to +85°C. 2Not production tested. Guaranteed by characterization at initial product release. Specifications subject to change without notice. REV. Normal Mode AD7564–SPECIFICATIONS (VDD = +4.75 V to +5.25 V; IOUT1A to IOUT1D = IOUT2A = IOUT2D = AGND = 0 V; VREF = +10 V; TA = TMIN to TMAX, unless otherwise noted) –2– B |
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