TMS27C512 65536 BY 8BIT UV ERASABLE

TMS27PC512 65536 BY 8BIT

PROGRAMMABLE READONLY MEMORIES

SMLS512G − NOVEMBER 1985 − REVISED SEPTEMBER 1997

4

POST OFFICE BOX 1443

initializing (TMS27PC512)

The one-time programmable TMS27PC512 PROM is provided with all bits in the logic high state, then logic lows

are programmed into the desired locations. Logic lows programmed into a PROM cannot be erased.

SNAP! Pulse programming

The 512K EPROM and OTP PROM are programmed using the TI SNAP! Pulse programming algorithm

illustrated by the flowchart in Figure 1, which programs in a nominal time of seven seconds. Actual programming

time varies as a function of the programmer used.

The SNAP! Pulse programming algorithm uses initial pulses of 100 microseconds (

µs) followed by a byte

verification to determine when the addressed byte has been successfully programmed. Up to 10 (ten) 100-

µs

pulses per byte are provided before a failure is recognized.

(eight bits) on pins DQ0 to DQ7. Once addresses and data are stable, E is pulsed.

More than one device can be programmed when the devices are connected in parallel. Locations can be

programmed in any order. When the SNAP! Pulse programming routine is complete, all bits are verified with

program inhibit

Programming can be inhibited by maintaining a high level input on the E pin.

program verify

signature mode

The signature mode provides access to a binary code identifying the manufacturer and type. This mode is

activated when A9 is forced to 12 V. Two identifier bytes are accessed by toggling A0. All other addresses must

be held low. the signature code for these devices is 9785. A0 selects the manufacturer’s code 97 (Hex), and

A0 high selects the device code 85, as shown in Table 3.

Table 3. Signature Mode

IDENTIFIER†

PINS

IDENTIFIER†

A0

DQ7

DQ6

DQ5

DQ4

DQ3

DQ2

DQ1

DQ0

HEX

Manufacturer Code

VIL

1

0

0

1

0

1

1

1

97

Device Code

VIH

1

0

0

0

0

1

0

1

85

† E = G = VIL, A9 = VH, A1−A8 = VIL, A10−A15 = VIL, PGM = VIH or VIL.