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HD6413258CP Datasheet(PDF) 8 Page - Renesas Technology Corp |
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HD6413258CP Datasheet(HTML) 8 Page - Renesas Technology Corp |
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8 / 301 page  9.2.5 Serial Mode Register (SMR) – H’FFD8.................................................................. 173 9.2.6 Serial Control Register (SCR) – H’FFDA............................................................... 175 9.2.7 Serial Status Register (SSR) – H’FFDC.................................................................. 177 9.2.8 Bit Rate Register (BRR) – H’FFD9 ........................................................................ 179 9.3 Operation .............................................................................................................................. 183 9.3.1 Overview ................................................................................................................. 183 9.3.2 Asynchronous Mode................................................................................................ 184 9.3.3 Synchronous Mode .................................................................................................. 188 9.4 Interrupts............................................................................................................................... 192 9.5 Application Notes ................................................................................................................. 193 Section 10. RAM.......................................................................................................................197 10.1 Overview............................................................................................................................... 197 10.2 Block Diagram...................................................................................................................... 197 10.3 RAM Enable Bit (RAME) .................................................................................................... 198 10.4 Operation .............................................................................................................................. 198 10.4.1 Expanded Modes (Modes 1 and 2) .......................................................................... 198 10.4.2 Single-Chip Mode (Mode 3) ................................................................................... 199 Section 11. ROM.......................................................................................................................201 11.1 Overview............................................................................................................................... 201 11.1.1 Block Diagram......................................................................................................... 202 11.2 PROM Mode......................................................................................................................... 202 11.2.1 PROM Mode Setup ................................................................................................. 202 11.2.2 Socket Adapter Pin Assignments and Memory Map............................................... 203 11.3 Programming ........................................................................................................................ 208 11.3.1 Selection of Sub-Modes in PROM Mode................................................................ 208 11.3.2 Writing and Verifying .............................................................................................. 209 11.3.3 Notes on Writing...................................................................................................... 215 11.3.4 Reliability of Written Data ...................................................................................... 215 11.3.5 Erasing of Data ........................................................................................................ 216 11.4 Handling of Windowed Packages ......................................................................................... 216 Section 12. Power-Down State..............................................................................................219 12.1 Overview............................................................................................................................... 219 12.2 System Control Register: Power-Down Control Bits .......................................................... 220 12.3 Sleep Mode ........................................................................................................................... 221 12.3.1 Transition to Sleep Mode......................................................................................... 222 v |
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