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EP2AGX125EF29I5N Datasheet(PDF) 39 Page - Altera Corporation |
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EP2AGX125EF29I5N Datasheet(HTML) 39 Page - Altera Corporation |
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39 / 78 page  Chapter 1: Device Datasheet for Arria II Devices 1–39 Switching Characteristics July 2012 Altera Corporation Arria II Device Handbook Volume 3: Device Datasheet and Addendum PCIe Receiver Jitter Tolerance (4) Total jitter at 2.5 Gbps (Gen1) Compliance pattern > 0.6 > 0.6 > 0.6 > 0.6 UI PCIe (Gen 1) Electrical Idle Detect Threshold (9) VRX-IDLE- DETDIFF (p-p) Compliance pattern 65 — 175 65 — 175 65 — 175 65 — 175 mV Serial RapidIO® (SRIO) Transmit Jitter Generation (5) Deterministic jitter (peak-to-peak) Data Rate = 1.25, 2.5, 3.125 Gbps Pattern = CJPAT — — 0.17 — — 0.17 — — 0.17 — — 0.17 UI Total jitter (peak-to-peak) Data Rate = 1.25, 2.5, 3.125 Gbps Pattern = CJPAT — — 0.35 — — 0.35 — — 0.35 — — 0.35 UI SRIO Receiver Jitter Tolerance (5) Deterministic jitter tolerance (peak-to-peak) Data Rate = 1.25, 2.5, 3.125 Gbps Pattern = CJPAT > 0.37 > 0.37 > 0.37 > 0.37 UI Combined deterministic and random jitter tolerance (peak-to-peak) Data Rate = 1.25, 2.5, 3.125 Gbps Pattern = CJPAT > 0.55 > 0.55 > 0.55 > 0.55 UI Sinusoidal jitter tolerance (peak-to-peak) Jitter frequency = 22.1 KHz Data rate = 1.25, 2.5, 3.125 Gbps Pattern = CJPAT > 8.5 > 8.5 > 8.5 > 8.5 UI Jitter frequency = 1.875 MHz Data rate = 1.25, 2.5, 3.125 Gbps Pattern = CJPAT > 0.1 > 0.1 > 0.1 > 0.1 UI Jitter frequency = 20 MHz Data rate = 1.25, 2.5, 3.125 Gbps Pattern = CJPAT > 0.1 > 0.1 > 0.1 > 0.1 UI GIGE Transmit Jitter Generation (6) Deterministic jitter (peak-to-peak) Pattern = CRPAT — — 0.14 — — 0.14 — — 0.14 — — 0.14 UI Table 1–40. Transceiver Block Jitter Specifications for Arria II GX Devices (Note 1) (Part 3 of 10) Symbol/ Description Conditions I3 C4 C5, I5 C6 Unit Min Typ Max Min Typ Max Min Typ Max Min Typ Max |
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