NCP1217A datasheet(10/19 Pages) ONSEMI

Part #	NCP1217A

Description	Enhanced PWM Current--Mode Controller for High--Power Universal Off--Line Supplies

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Manufacturer	ONSEMI [ON Semiconductor]

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NCP1217, NCP1217A

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10

Figure 18. Typical Waveforms in Short Circuit Conditions

VCCON = 12.8 V

VCC

DRIVING PULSES

VCCmin =7.6 V

VCClatch =5.6 V

Calculating the VCC Capacitor

The VCC capacitor can be calculated knowing the IC

consumption as soon as VCC reaches 12.8 V. Suppose that a

NCP1217P065 is used and drives a MOSFET with a 30 nC

total gate charge (Qg). The total average current is thus

made of ICC1 (750 mA) plus the driver current,

Fsw * Qg = 1.95 mA. The total current is therefore 2.7 mA.

The ΔV available to fully startup the circuit (e.g. never reach

the 8.2 V VCCmin during power on) is 13.7--8.2 = 5.5 V

best case or 4.9 V worse case (11.9--7.0).Wehavea

capacitor that then needs to supply the NCP1217 with

2.7 mA during a given time until the auxiliary supply takes

over. Suppose that this time was measured at around 15 ms.

CVCC is calculated using the equation C =

Δt·i

ΔV

or

C ≥ 8.3 mF. Select a 22 mF/25 V and this will fit.

Skipping Cycle Mode

The NCP1217 automatically skips switching cycles when

the output power demand drops below a given level. This is

accomplished by monitoring the FB pin. In normal

operation, pin 2 imposes a peak current accordingly to the

load value. If the load demand decreases, the internal loop

asks for less peak current. When this setpoint reaches a

determined level (Vpin 1), the IC prevents the current from

decreasing further down and starts to blank the output

pulses: the IC enters the so--called skip cycle mode, also

named controlled burst operation. The power transfer now

depends upon the width of the pulse bunches (Figure 20).

Suppose we have the following component values:

Lp, primary inductance = 350 mH

Fsw, switching frequency = 65 kHz

Ip skip = 600 mA (or 333 mV/Rsense)

The

theoretical

power

transfer

is

therefore:

1

2

·Lp·Ip2 ·Fsw = 4.1 W. If this IC enters skip cycle

mode with a bunch length of 10 ms over a recurrent

period of 100 ms, then the total power transfer is:

4.1 * 0.1 = 410 mW.

To better understand how this skip cycle mode takes place,

a look at the operation mode versus the FB level

immediately gives the necessary insight.

Figure 19.

SKIP CYCLE OPERATION

IP(min) = 333 mV/RSENSE

NORMAL CURRENT

MODE OPERATION

FB

1V

4.2 V, FB Pin Open

3.2 V, Upper

Dynamic Range

Time

When FB is above the skip cycle threshold (1.0 V by

default), the peak current cannot exceed 1.0 V/Rsense.

When the IC enters the skip cycle mode, the peak current

cannot go below Vpin1/3.3. The user still has the flexibility

to alter this 1.0 V by either shunting pin 1 to ground through

a resistor or raising it through a resistor up to the desired

level. In this later case, care must be taken to keep sufficient

margin between this pin 1 adjustment level and the latchoff

level. Grounding pin 1 permanently invalidates the skip

cycle operation.

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