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LMP7300MA Datasheet(PDF) 9 Page - Texas Instruments |
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LMP7300MA Datasheet(HTML) 9 Page - Texas Instruments |
9 / 17 page LMP7300 www.ti.com SNOSAT7F – AUGUST 2007 – REVISED MARCH 2013 APPLICATION INFORMATION GENERAL DESCRIPTION The LMP7300 is a unique combination of micropower and precision. The open collector comparator has low offset, high CMRR, high PSRR, programmable hysteresis and microamp supply current. The precision 2.048V reference provides a DAC or ADC with an accurate binary divisible voltage. The comparator and reference combination forms an ideal single IC solution for low power sensor or portable applications. VOLTAGE REFERENCE The reference output voltage is a band gap derived 2.048V that is trimmed to achieve typically 0.2% accuracy over the full operating temperature range of −40°C to 125°C. The trim procedure employs a curvature correction algorithm to compensate for the base emitter thermal nonlinearity inherent in band gap design topologies. The reference accuracy and the set resistor tolerance determine the magnitude and precision of the programmable hysteresis. In situations where reference noise filtering is required a 5 µF capacitor in series with a 190 Ω resistor to ground are recommended. COMPARATOR Output Stage The comparator employs an open collector output stage that can switch microamp loads for micropower precision threshold detection to applications requiring activating a solenoid, a lamp, or an LED. The wired-OR type output easily interfaces to TTL, CMOS, or multiple outputs, as in a window comparator application, over a range of 0.5V to 12V. The output is capable of driving greater than 10 mA output current and yet maintaining a saturation voltage below 0.4V over temperature. The supply current increases linearly when driving heavy loads so a pullup resistor of 100 k Ω or greater is recommended for micropower applications. Fault Detection Rate The user’s choice of a pullup resistor and capacitive load determines the minimum response time and the event detection rate. By optimizing overdrive, the pullup resistor and capactive load fault update rates of 200 kHz to 250 kHz or greater can be achieved. HYSTERESIS False triggering on noise coupled into the signal path is a common problem for comparator based threshold detectors. One of the most effective solutions is to add hysteresis. Hysteresis is a circuit signal path characteristic where an amplitude delay is introduced to the normal input. Positive hysteresis forces the signal to pass the normal switch point before the output makes a low to high transition while negative hysteresis does the opposite. This is a memory effect. The comparator behaves differently based on which direction the signal is going. The LM7300 has been designed with a unique way of introducing hysteresis. The set points are completely independent of each other, the power supply, and the input or output conditions. The HYSTP pin sets positive hysteresis and the HYSTN pin sets the negative hysteresis in a simple way using two resistors. The pins can be tied together for the same hysteresis or tied to separate voltage taps for asymmetric hysteresis, or tied to the reference for no hysteresis. When the precision reference is used to drive the voltage tap resistor divider precise, stable threshold levels can be obtained. The maximum recommended hysteresis is about 130 mV. This places the HYSTP and HYSTN pin voltages at VREF – 130 mV which is approximately the center of their input common mode range at 2.7V. For the typical example, a differential input signal voltage, VIN, is applied between INP and INN, the non-inverting and inverting inputs of the comparator. A DC switch or threshold voltage, VTH, is set on the negative input to keep the output off when the signal is above and on when it goes below this level. For a precision threshold tie the INN pin to VREF. With the output, off the circuit is in the minimum power state. Figure 14 through Figure 22 demonstrate the different configurations for setting the upper threshold VIH and the lower threshold VIL and their relationship to the input trip point VREF, by the following formulas. Copyright © 2007–2013, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: LMP7300 |
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