SN65HVD10, SN65HVD10Q, SN75HVD10

SN65HVD11, SN65HVD11Q, SN75HVD11

SN65HVD12, SN75HVD12

SLLS505M – FEBRUARY 2002 – REVISED JULY 2013

www.ti.com

RECEIVER SWITCHING CHARACTERISTICS

over recommended operating conditions unless otherwise noted

PARAMETER

TEST CONDITIONS

MIN

MAX

UNIT

Propagation delay time, low-to-high-level output

HVD10

12.5

20

25

ns

Propagation delay time, high-to-low-level output

HVD10

12.5

20

25

HVD11

Propagation delay time, low-to-high-level output

30

55

70

ns

HVD12

HVD11

Propagation delay time, high-to-low-level output

30

55

70

ns

HVD12

See Figure 8

HVD10

1.5

HVD11

4

ns

HVD12

4

HVD10

8

(2)

Part-to-part skew

HVD11

15

ns

HVD12

15

Output signal rise time

1

2

5

ns

See Figure 8

Output signal fall time

1

2

5

(1)

Output enable time to high level

15

(1)

Output enable time to low level

15

ns

See Figure 9

Output disable time from high level

20

Output disable time from low level

15

(2)

Propagation delay time, standby-to-high-level output

6

μs

See Figure 10

(2)

Propagation delay time, standby-to-low-level output

6

(1)

All typical values are at 25°C and with a 3.3-V supply

(2)

operate with the same supply voltages, at the same temperature, and have identical packages and test circuits.

THERMAL CHARACTERISTICS

over operating free-air temperature range unless otherwise noted

(1)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

High

D pkg

121

Junction

−to−ambient thermal

P pkg

93

High

−K board

D pkg

67

Junction

−to−board thermal

°C/W

resistance

P pkg

57

D pkg

41

Junction

−to−case thermal

resistance

P pkg

55

HVD10

198

250

(32 Mbps)

HVD11

141

176

Device power dissipation

mW

Input to D a 50% duty cycle square

(10 Mbps)

wave at indicated signaling rate

HVD12

133

161

(500 kbps)

High

−K board, No airflow

D pkg

–40

116

Ambient air temperature

P pkg

–40

123

°C

Thermal shutdown junction temperature

165

(1)

See Application Information section for an explanation of these parameters.

(2)

The intent of

This methodology is not meant to and will not predict the performance of a package in an application-specific environment.

(3)

JSD51

−7, High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages.

(4)

JESD51

−10, Test Boards for Through-Hole Perimeter Leaded Package Thermal Measurements.

6

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